877 lines
28 KiB
Rust
877 lines
28 KiB
Rust
#![no_std]
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#![allow(unused)]
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extern crate byteorder;
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extern crate embedded_hal as hal;
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#[macro_use(block)]
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extern crate nb;
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use hal::digital::v2::OutputPin;
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use hal::spi::FullDuplex;
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use byteorder::BigEndian;
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use byteorder::ByteOrder;
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const COMMAND_READ: u8 = 0x00 << 2;
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const COMMAND_WRITE: u8 = 0x01 << 2;
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const VARIABLE_DATA_LENGTH: u8 = 0b_00;
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const FIXED_DATA_LENGTH_1_BYTE: u8 = 0b_01;
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const FIXED_DATA_LENGTH_2_BYTES: u8 = 0b_10;
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const FIXED_DATA_LENGTH_4_BYTES: u8 = 0b_11;
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/// IP Address struct. Represents an IP address as a u8 array of length 4. Can be instantiated with `IpAddress::new`
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#[derive(Copy, Clone, PartialOrd, PartialEq, Default, Debug)]
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pub struct IpAddress {
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pub address: [u8; 4],
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}
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impl IpAddress {
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/// Instantiate a new IP address with u8s for each address fragment
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pub fn new(a0: u8, a1: u8, a2: u8, a3: u8) -> IpAddress {
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IpAddress {
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address: [a0, a1, a2, a3],
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}
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}
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}
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impl ::core::fmt::Display for IpAddress {
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/// String formatter for IP addresses, useful for debugging output
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fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
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write!(
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f,
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"{}.{}.{}.{}",
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self.address[0], self.address[1], self.address[2], self.address[3],
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)
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}
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}
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/// MAC address struct. Represents a MAC address as a u8 array of length 6. Can be instantiated with `MacAddress::new`
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#[derive(Copy, Clone, PartialOrd, PartialEq, Default, Debug)]
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pub struct MacAddress {
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pub address: [u8; 6],
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}
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impl MacAddress {
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/// Instantiate a new MAC address with u8s for each address fragment
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pub fn new(a0: u8, a1: u8, a2: u8, a3: u8, a4: u8, a5: u8) -> MacAddress {
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MacAddress {
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address: [a0, a1, a2, a3, a4, a5],
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}
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}
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}
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impl ::core::fmt::Display for MacAddress {
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/// String formatter for MAC addresses, useful for debugging output
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fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
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write!(
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f,
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"{:02x}:{:02x}:{:02x}:{:02x}:{:02x}:{:02x}",
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self.address[0],
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self.address[1],
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self.address[2],
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self.address[3],
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self.address[4],
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self.address[5],
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)
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}
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}
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/// Error enum that represents the union between SPI hardware errors and digital IO pin errors. Returned as an Error
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/// type by many W5500 that talk to the chip
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#[derive(Copy, Clone, Debug)]
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pub enum TransferError<SpiError, ChipSelectError> {
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SpiError(SpiError),
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ChipSelectError(ChipSelectError),
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}
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/// Settings for wake on LAN. Allows the W5500 to optionally emit an interrupt upon receiving a packet
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#[derive(Copy, Clone, PartialOrd, PartialEq)]
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pub enum OnWakeOnLan {
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InvokeInterrupt,
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Ignore,
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}
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/// Settings for ping. Allows the W5500 to respond to or ignore network ping requests
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#[derive(Copy, Clone, PartialOrd, PartialEq)]
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pub enum OnPingRequest {
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Respond,
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Ignore,
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}
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/// Use [TransmissionMode::PPoE] when talking
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/// to an ADSL modem. Otherwise use [TransmissionMode::Ethernet]
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#[derive(Copy, Clone, PartialOrd, PartialEq)]
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pub enum ConnectionType {
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PPoE,
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Ethernet,
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}
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#[derive(Copy, Clone, PartialOrd, PartialEq)]
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pub enum ArpResponses {
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Cache,
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DropAfterUse,
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}
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/// Represents a socket that has not yet been initialized for a particular protocol
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pub struct UninitializedSocket(Socket);
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/// Represents a socket that has been initialized to use the UDP protocol
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pub struct UdpSocket(Socket);
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/// The first level of instantiating communication with the W5500. It can not communicate by itself, but calling
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/// `activate` will return an `ActiveW5500` which can.
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pub struct W5500<'a, ChipSelect: OutputPin> {
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chip_select: &'a mut ChipSelect,
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sockets: u8, // each bit represents whether the corresponding socket is available for take
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}
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impl<'b, 'a: 'b, ChipSelectError, ChipSelect: OutputPin<Error = ChipSelectError>>
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W5500<'a, ChipSelect>
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{
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fn new(chip_select: &'a mut ChipSelect) -> Self {
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W5500 {
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chip_select,
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sockets: 0xFF,
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}
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}
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/// Primary method for instantiating. Briefly activates the W5500, and sets it up with the specified configuration
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pub fn with_initialisation<'c, Spi: FullDuplex<u8>>(
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chip_select: &'a mut ChipSelect,
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spi: &'c mut Spi,
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wol: OnWakeOnLan,
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ping: OnPingRequest,
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mode: ConnectionType,
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arp: ArpResponses,
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) -> Result<Self, TransferError<Spi::Error, ChipSelectError>> {
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let mut w5500 = Self::new(chip_select);
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{
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let mut w5500_active = w5500.activate(spi)?;
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unsafe {
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w5500_active.reset()?;
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}
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w5500_active.update_operation_mode(wol, ping, mode, arp)?;
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}
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Ok(w5500)
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}
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/// Returns the requested socket if it is not already used.
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pub fn take_socket(&mut self, socket: Socket) -> Option<UninitializedSocket> {
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let mask = (0x01 << socket.number());
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if self.sockets & mask == mask {
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self.sockets &= !mask;
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Some(UninitializedSocket(socket))
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} else {
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None
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}
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}
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/// Creates a new `ActiveW5500` with the provided `FullDuplex` implementation
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pub fn activate<'c, Spi: FullDuplex<u8>>(
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&'b mut self,
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spi: &'c mut Spi,
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) -> Result<ActiveW5500<'b, 'a, 'c, ChipSelect, Spi>, TransferError<Spi::Error, ChipSelectError>>
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{
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Ok(ActiveW5500(self, spi))
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}
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}
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/// Struct that can communicate with the W5500 chip, configuring it and reading/writing to the registers on a low level
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pub struct ActiveW5500<'a, 'b: 'a, 'c, ChipSelect: OutputPin, Spi: FullDuplex<u8>>(
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&'a mut W5500<'b, ChipSelect>,
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&'c mut Spi,
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);
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impl<
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ChipSelectError,
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ChipSelect: OutputPin<Error = ChipSelectError>,
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SpiError,
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Spi: FullDuplex<u8, Error = SpiError>,
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> ActiveW5500<'_, '_, '_, ChipSelect, Spi>
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{
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/// Returns the requested socket if it is not already used
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pub fn take_socket(&mut self, socket: Socket) -> Option<UninitializedSocket> {
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self.0.take_socket(socket)
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}
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/// Set up basic configuration of the W5500 chip
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pub fn update_operation_mode(
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&mut self,
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wol: OnWakeOnLan,
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ping: OnPingRequest,
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mode: ConnectionType,
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arp: ArpResponses,
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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let mut value = 0x00;
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if let OnWakeOnLan::InvokeInterrupt = wol {
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value |= (1 << 5);
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}
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if let OnPingRequest::Ignore = ping {
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value |= (1 << 4);
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}
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if let ConnectionType::PPoE = mode {
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value |= (1 << 3);
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}
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if let ArpResponses::DropAfterUse = arp {
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value |= (1 << 1);
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}
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self.write_to(Register::CommonRegister(0x00_00_u16), &[value])
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}
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/// Sets the IP address of the network gateway (router)
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pub fn set_gateway(
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&mut self,
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gateway: IpAddress,
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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self.write_to(Register::CommonRegister(0x00_01_u16), &gateway.address)
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}
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/// Sets the subnet on the network
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pub fn set_subnet(
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&mut self,
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subnet: IpAddress,
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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self.write_to(Register::CommonRegister(0x00_05_u16), &subnet.address)
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}
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/// Sets the MAC address of the W5500 device on the network
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pub fn set_mac(
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&mut self,
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mac: MacAddress,
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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self.write_to(Register::CommonRegister(0x00_09_u16), &mac.address)
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}
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/// Sets the IP address of the W5500 device on network. Must be within the range permitted by the gateway
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pub fn set_ip(
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&mut self,
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ip: IpAddress,
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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self.write_to(Register::CommonRegister(0x00_0F_u16), &ip.address)
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}
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/// Reads 4 bytesfrom any register location and returns the value as an IP address
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pub fn read_ip(
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&mut self,
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register: Register,
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) -> Result<IpAddress, TransferError<SpiError, ChipSelectError>> {
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let mut ip = IpAddress::default();
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self.read_from(register, &mut ip.address)?;
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Ok(ip)
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}
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/// This is unsafe because it cannot set taken sockets back to be uninitialized
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/// It assumes, none of the old sockets will used anymore. Otherwise that socket
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/// will have undefined behavior.
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pub unsafe fn reset(&mut self) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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self.write_to(
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Register::CommonRegister(0x00_00_u16),
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&[
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0b1000_0000, // Mode Register (force reset)
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],
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)?;
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self.0.sockets = 0xFF;
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Ok(())
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}
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/// TODO document
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fn is_interrupt_set(
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&mut self,
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socket: Socket,
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interrupt: Interrupt,
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) -> Result<bool, TransferError<SpiError, ChipSelectError>> {
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let mut state = [0u8; 1];
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self.read_from(socket.at(SocketRegister::Interrupt), &mut state)?;
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Ok(state[0] & interrupt as u8 != 0)
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}
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/// TODO document
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pub fn reset_interrupt(
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&mut self,
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socket: Socket,
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interrupt: Interrupt,
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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self.write_to(socket.at(SocketRegister::Interrupt), &[interrupt as u8])
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}
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/// Reads one byte from any register address as a u8
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fn read_u8(
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&mut self,
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register: Register,
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) -> Result<u8, TransferError<SpiError, ChipSelectError>> {
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let mut buffer = [0u8; 1];
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self.read_from(register, &mut buffer)?;
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Ok(buffer[0])
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}
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/// Reads two bytes from any register address and returns as a u16
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fn read_u16(
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&mut self,
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register: Register,
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) -> Result<u16, TransferError<SpiError, ChipSelectError>> {
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let mut buffer = [0u8; 2];
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self.read_from(register, &mut buffer)?;
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Ok(BigEndian::read_u16(&buffer))
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}
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/// Reads enough bytes from any register address to fill the `target` u8 slice
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fn read_from(
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&mut self,
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register: Register,
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target: &mut [u8],
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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self.chip_select()
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.map_err(|error| -> TransferError<SpiError, ChipSelectError> {
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TransferError::ChipSelectError(error)
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})?;
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let mut request = [
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0_u8,
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0_u8,
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register.control_byte() | COMMAND_READ | VARIABLE_DATA_LENGTH,
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];
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BigEndian::write_u16(&mut request[..2], register.address());
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let result = self
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.write_bytes(&request)
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.and_then(|_| self.read_bytes(target));
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self.chip_deselect()
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.map_err(|error| -> TransferError<SpiError, ChipSelectError> {
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TransferError::ChipSelectError(error)
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})?;
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result.map_err(|error| TransferError::SpiError(error))
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}
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/// Reads enough bytes over SPI to fill the `target` u8 slice
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fn read_bytes(&mut self, bytes: &mut [u8]) -> Result<(), SpiError> {
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for byte in bytes {
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*byte = self.read()?;
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}
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Ok(())
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}
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/// Reads a single byte over SPI by writing a zero and reading the response
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fn read(&mut self) -> Result<u8, SpiError> {
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block!(self.1.send(0x00))?;
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block!(self.1.read())
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}
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/// Write a single u8 byte to any register address
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fn write_u8(
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&mut self,
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register: Register,
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value: u8,
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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self.write_to(register, &[value])
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}
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/// Write a u16 as two bytes o any register address
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fn write_u16(
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&mut self,
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register: Register,
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value: u16,
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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let mut data = [0u8; 2];
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BigEndian::write_u16(&mut data, value);
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self.write_to(register, &data)
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}
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/// Write a slice of u8 bytes to any register address
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fn write_to(
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&mut self,
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register: Register,
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data: &[u8],
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) -> Result<(), TransferError<SpiError, ChipSelectError>> {
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self.chip_select()
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.map_err(|error| -> TransferError<SpiError, ChipSelectError> {
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TransferError::ChipSelectError(error)
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})?;
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let mut request = [
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0_u8,
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0_u8,
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register.control_byte() | COMMAND_WRITE | VARIABLE_DATA_LENGTH,
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];
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BigEndian::write_u16(&mut request[..2], register.address());
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let result = self
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.write_bytes(&request)
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.and_then(|_| self.write_bytes(data));
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self.chip_deselect()
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.map_err(|error| -> TransferError<SpiError, ChipSelectError> {
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TransferError::ChipSelectError(error)
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})?;
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result.map_err(|error| TransferError::SpiError(error))
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}
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/// Write a slice of u8 bytes over SPI
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fn write_bytes(&mut self, bytes: &[u8]) -> Result<(), SpiError> {
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for b in bytes {
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self.write(*b)?;
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}
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Ok(())
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}
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/// Write a single byte over SPI
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fn write(&mut self, byte: u8) -> Result<(), SpiError> {
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block!(self.1.send(byte))?;
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block!(self.1.read())?;
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Ok(())
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}
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/// Begin a SPI frame by setting the CS signal to low
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fn chip_select(&mut self) -> Result<(), ChipSelectError> {
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self.0.chip_select.set_low()
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}
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/// End a SPI frame by setting the CS signal to high
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fn chip_deselect(&mut self) -> Result<(), ChipSelectError> {
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self.0.chip_select.set_high()
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}
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}
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pub trait IntoUdpSocket<SpiError> {
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fn try_into_udp_server_socket(self, port: u16) -> Result<UdpSocket, SpiError>
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where
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Self: Sized;
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}
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impl<ChipSelect: OutputPin, Spi: FullDuplex<u8>> IntoUdpSocket<UninitializedSocket>
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for (
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&mut ActiveW5500<'_, '_, '_, ChipSelect, Spi>,
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UninitializedSocket,
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)
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{
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/// Initialize a socket to operate in UDP mode
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fn try_into_udp_server_socket(self, port: u16) -> Result<UdpSocket, UninitializedSocket> {
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let socket = (self.1).0;
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(|| {
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self.0.reset_interrupt(socket, Interrupt::SendOk)?;
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self.0
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.write_u16(socket.at(SocketRegister::LocalPort), port)?;
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self.0.write_to(
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socket.at(SocketRegister::Mode),
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&[
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Protocol::UDP as u8, // Socket Mode Register
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SocketCommand::Open as u8, // Socket Command Register
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],
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)?;
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Ok(UdpSocket(socket))
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})()
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.map_err(|_: TransferError<Spi::Error, ChipSelect::Error>| UninitializedSocket(socket))
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}
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}
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/// UDP trait that can send and receive UDP packets
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pub trait Udp {
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type Error;
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fn receive(
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&mut self,
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target_buffer: &mut [u8],
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) -> Result<Option<(IpAddress, u16, usize)>, Self::Error>;
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fn blocking_send(
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&mut self,
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host: &IpAddress,
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host_port: u16,
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data: &[u8],
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) -> Result<(), Self::Error>;
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}
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impl<ChipSelect: OutputPin, Spi: FullDuplex<u8>> Udp
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for (&mut ActiveW5500<'_, '_, '_, ChipSelect, Spi>, &UdpSocket)
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{
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type Error = TransferError<Spi::Error, ChipSelect::Error>;
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/// Returns a UDP packet if one is available. Will return `None` if no UDP packets are in the socket's buffer
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fn receive(
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&mut self,
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destination: &mut [u8],
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) -> Result<Option<(IpAddress, u16, usize)>, Self::Error> {
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let (w5500, UdpSocket(socket)) = self;
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if w5500.read_u8(socket.at(SocketRegister::InterruptMask))? & 0x04 == 0 {
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return Ok(None);
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}
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let receive_size = loop {
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let s0 = w5500.read_u16(socket.at(SocketRegister::RxReceivedSize))?;
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let s1 = w5500.read_u16(socket.at(SocketRegister::RxReceivedSize))?;
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if s0 == s1 {
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|
break s0 as usize;
|
|
}
|
|
};
|
|
if receive_size >= 8 {
|
|
let read_pointer = w5500.read_u16(socket.at(SocketRegister::RxReadPointer))?;
|
|
|
|
// |<-- read_pointer read_pointer + received_size -->|
|
|
// |Destination IP Address | Destination Port | Byte Size of DATA | Actual DATA ... |
|
|
// | --- 4 Bytes --- | --- 2 Bytes --- | --- 2 Bytes --- | .... |
|
|
|
|
let ip = w5500.read_ip(socket.rx_register_at(read_pointer))?;
|
|
let port = w5500.read_u16(socket.rx_register_at(read_pointer + 4))?;
|
|
let data_length = destination
|
|
.len()
|
|
.min(w5500.read_u16(socket.rx_register_at(read_pointer + 6))? as usize);
|
|
|
|
w5500.read_from(
|
|
socket.rx_register_at(read_pointer + 8),
|
|
&mut destination[..data_length],
|
|
)?;
|
|
|
|
// reset
|
|
w5500.write_u16(
|
|
socket.at(SocketRegister::RxReadPointer),
|
|
read_pointer + receive_size as u16,
|
|
)?;
|
|
w5500.write_u8(
|
|
socket.at(SocketRegister::Command),
|
|
SocketCommand::Recv as u8,
|
|
)?;
|
|
|
|
Ok(Some((ip, port, data_length)))
|
|
} else {
|
|
Ok(None)
|
|
}
|
|
}
|
|
|
|
/// Sends a UDP packet to the specified IP and port, and blocks until it is sent
|
|
fn blocking_send(
|
|
&mut self,
|
|
host: &IpAddress,
|
|
host_port: u16,
|
|
data: &[u8],
|
|
) -> Result<(), Self::Error> {
|
|
let (w5500, UdpSocket(socket)) = self;
|
|
|
|
{
|
|
let local_port = w5500.read_u16(socket.at(SocketRegister::LocalPort))?;
|
|
let local_port = local_port.to_be_bytes();
|
|
let host_port = host_port.to_be_bytes();
|
|
|
|
w5500.write_to(
|
|
socket.at(SocketRegister::LocalPort),
|
|
&[
|
|
local_port[0],
|
|
local_port[1], // local port u16
|
|
0x00,
|
|
0x00,
|
|
0x00,
|
|
0x00,
|
|
0x00,
|
|
0x00, // destination mac
|
|
host.address[0],
|
|
host.address[1],
|
|
host.address[2],
|
|
host.address[3], // target IP
|
|
host_port[0],
|
|
host_port[1], // destination port (5354)
|
|
],
|
|
)?;
|
|
}
|
|
|
|
let data_length = data.len() as u16;
|
|
{
|
|
let data_length = data_length.to_be_bytes();
|
|
|
|
// TODO why write [0x00, 0x00] at TxReadPointer at all?
|
|
// TODO Is TxWritePointer not sufficient enough?
|
|
w5500.write_to(
|
|
socket.at(SocketRegister::TxReadPointer),
|
|
&[0x00, 0x00, data_length[0], data_length[1]],
|
|
);
|
|
}
|
|
|
|
w5500.write_to(
|
|
socket.tx_register_at(0x00_00),
|
|
&data[..data_length as usize],
|
|
)?;
|
|
|
|
w5500.write_to(
|
|
socket.at(SocketRegister::Command),
|
|
&[SocketCommand::Send as u8],
|
|
)?;
|
|
|
|
for _ in 0..0xFFFF {
|
|
// wait until sent
|
|
if w5500.is_interrupt_set(*socket, Interrupt::SendOk)? {
|
|
w5500.reset_interrupt(*socket, Interrupt::SendOk)?;
|
|
break;
|
|
}
|
|
}
|
|
// restore listen state
|
|
w5500.write_to(
|
|
socket.at(SocketRegister::Mode),
|
|
&[
|
|
Protocol::UDP as u8, // Socket Mode Register
|
|
SocketCommand::Open as u8, // Socket Command Register
|
|
],
|
|
)?;
|
|
Ok(())
|
|
}
|
|
}
|
|
|
|
/// Offset addresses in each socket register
|
|
#[repr(u8)]
|
|
#[derive(Copy, Clone, PartialEq, Debug)]
|
|
pub enum SocketRegister {
|
|
Mode = 0x0000,
|
|
Command = 0x0001,
|
|
Interrupt = 0x0002,
|
|
Status = 0x0003,
|
|
LocalPort = 0x0004,
|
|
DestinationMac = 0x0006,
|
|
DestinationIp = 0x000C,
|
|
DestinationPort = 0x0010,
|
|
MaxSegmentSize = 0x0012,
|
|
// Reserved 0x0014
|
|
TypeOfService = 0x0015,
|
|
TimeToLive = 0x0016,
|
|
// Reserved 0x0017 - 0x001D
|
|
ReceiveBuffer = 0x001E,
|
|
TransmitBuffer = 0x001F,
|
|
TxFreeSize = 0x0020,
|
|
TxReadPointer = 0x0022,
|
|
TxWritePointer = 0x0024,
|
|
RxReceivedSize = 0x0026,
|
|
RxReadPointer = 0x0028,
|
|
RxWritePointer = 0x002A,
|
|
InterruptMask = 0x002C,
|
|
FragmentOffset = 0x002D,
|
|
KeepAliveTimer = 0x002F,
|
|
// Reserved 0x0030 - 0xFFFF
|
|
}
|
|
|
|
/// Interrupt state bits
|
|
#[repr(u8)]
|
|
#[derive(Copy, Clone, PartialEq, Debug)]
|
|
pub enum Interrupt {
|
|
SendOk = 1 << 4,
|
|
Timeout = 1 << 3,
|
|
Received = 1 << 2,
|
|
Disconnected = 1 << 1,
|
|
Connected = 1, // 1 << 0
|
|
}
|
|
|
|
/// Register protocol mode bits
|
|
#[repr(u8)]
|
|
#[derive(Copy, Clone, PartialEq, Debug)]
|
|
pub enum Protocol {
|
|
TCP = 0b0001,
|
|
UDP = 0b0010,
|
|
MACRAW = 0b0100,
|
|
}
|
|
|
|
/// Bits for socket commands
|
|
#[repr(u8)]
|
|
#[derive(Copy, Clone, PartialEq, Debug)]
|
|
pub enum SocketCommand {
|
|
Open = 0x01,
|
|
Listen = 0x02,
|
|
Connect = 0x04,
|
|
Disconnect = 0x08,
|
|
Close = 0x10,
|
|
Send = 0x20,
|
|
SendMac = 0x21,
|
|
SendKeep = 0x22,
|
|
Recv = 0x40,
|
|
}
|
|
|
|
/// Identifiers for each socket on the W5500
|
|
#[derive(Copy, Clone, PartialEq, PartialOrd, Debug)]
|
|
pub enum Socket {
|
|
Socket0,
|
|
Socket1,
|
|
Socket2,
|
|
Socket3,
|
|
Socket4,
|
|
Socket5,
|
|
Socket6,
|
|
Socket7,
|
|
}
|
|
|
|
impl Socket {
|
|
/// Gets the number of any given socket
|
|
pub fn number(self) -> usize {
|
|
match self {
|
|
Socket::Socket0 => 0,
|
|
Socket::Socket1 => 1,
|
|
Socket::Socket2 => 2,
|
|
Socket::Socket3 => 3,
|
|
Socket::Socket4 => 4,
|
|
Socket::Socket5 => 5,
|
|
Socket::Socket6 => 6,
|
|
Socket::Socket7 => 7,
|
|
}
|
|
}
|
|
|
|
/// Returns the register address for a socket instance's TX
|
|
fn tx_register_at(self, address: u16) -> Register {
|
|
match self {
|
|
Socket::Socket0 => Register::Socket0TxBuffer(address),
|
|
Socket::Socket1 => Register::Socket1TxBuffer(address),
|
|
Socket::Socket2 => Register::Socket2TxBuffer(address),
|
|
Socket::Socket3 => Register::Socket3TxBuffer(address),
|
|
Socket::Socket4 => Register::Socket4TxBuffer(address),
|
|
Socket::Socket5 => Register::Socket5TxBuffer(address),
|
|
Socket::Socket6 => Register::Socket6TxBuffer(address),
|
|
Socket::Socket7 => Register::Socket7TxBuffer(address),
|
|
}
|
|
}
|
|
|
|
/// Returns the register address for a socket instance's RX
|
|
fn rx_register_at(self, address: u16) -> Register {
|
|
match self {
|
|
Socket::Socket0 => Register::Socket0RxBuffer(address),
|
|
Socket::Socket1 => Register::Socket1RxBuffer(address),
|
|
Socket::Socket2 => Register::Socket2RxBuffer(address),
|
|
Socket::Socket3 => Register::Socket3RxBuffer(address),
|
|
Socket::Socket4 => Register::Socket4RxBuffer(address),
|
|
Socket::Socket5 => Register::Socket5RxBuffer(address),
|
|
Socket::Socket6 => Register::Socket6RxBuffer(address),
|
|
Socket::Socket7 => Register::Socket7RxBuffer(address),
|
|
}
|
|
}
|
|
|
|
/// Returns the register address for a socket instance's register
|
|
fn register_at(self, address: u16) -> Register {
|
|
match self {
|
|
Socket::Socket0 => Register::Socket0Register(address),
|
|
Socket::Socket1 => Register::Socket1Register(address),
|
|
Socket::Socket2 => Register::Socket2Register(address),
|
|
Socket::Socket3 => Register::Socket3Register(address),
|
|
Socket::Socket4 => Register::Socket4Register(address),
|
|
Socket::Socket5 => Register::Socket5Register(address),
|
|
Socket::Socket6 => Register::Socket6Register(address),
|
|
Socket::Socket7 => Register::Socket7Register(address),
|
|
}
|
|
}
|
|
|
|
fn at(self, register: SocketRegister) -> Register {
|
|
self.register_at(register as u16)
|
|
}
|
|
}
|
|
|
|
/// Chip register names
|
|
#[derive(Copy, Clone, PartialEq, Debug)]
|
|
pub enum Register {
|
|
CommonRegister(u16),
|
|
|
|
Socket0Register(u16),
|
|
Socket0TxBuffer(u16),
|
|
Socket0RxBuffer(u16),
|
|
|
|
Socket1Register(u16),
|
|
Socket1TxBuffer(u16),
|
|
Socket1RxBuffer(u16),
|
|
|
|
Socket2Register(u16),
|
|
Socket2TxBuffer(u16),
|
|
Socket2RxBuffer(u16),
|
|
|
|
Socket3Register(u16),
|
|
Socket3TxBuffer(u16),
|
|
Socket3RxBuffer(u16),
|
|
|
|
Socket4Register(u16),
|
|
Socket4TxBuffer(u16),
|
|
Socket4RxBuffer(u16),
|
|
|
|
Socket5Register(u16),
|
|
Socket5TxBuffer(u16),
|
|
Socket5RxBuffer(u16),
|
|
|
|
Socket6Register(u16),
|
|
Socket6TxBuffer(u16),
|
|
Socket6RxBuffer(u16),
|
|
|
|
Socket7Register(u16),
|
|
Socket7TxBuffer(u16),
|
|
Socket7RxBuffer(u16),
|
|
}
|
|
|
|
impl Register {
|
|
/// Gets the control bits to identify any given register
|
|
fn control_byte(self) -> u8 {
|
|
#[allow(clippy::inconsistent_digit_grouping)]
|
|
match self {
|
|
Register::CommonRegister(_) => 0b00000_000,
|
|
|
|
Register::Socket0Register(_) => 0b00001_000,
|
|
Register::Socket0TxBuffer(_) => 0b00010_000,
|
|
Register::Socket0RxBuffer(_) => 0b00011_000,
|
|
|
|
Register::Socket1Register(_) => 0b00101_000,
|
|
Register::Socket1TxBuffer(_) => 0b00110_000,
|
|
Register::Socket1RxBuffer(_) => 0b00111_000,
|
|
|
|
Register::Socket2Register(_) => 0b01001_000,
|
|
Register::Socket2TxBuffer(_) => 0b01010_000,
|
|
Register::Socket2RxBuffer(_) => 0b01011_000,
|
|
|
|
Register::Socket3Register(_) => 0b01101_000,
|
|
Register::Socket3TxBuffer(_) => 0b01110_000,
|
|
Register::Socket3RxBuffer(_) => 0b01111_000,
|
|
|
|
Register::Socket4Register(_) => 0b10001_000,
|
|
Register::Socket4TxBuffer(_) => 0b10010_000,
|
|
Register::Socket4RxBuffer(_) => 0b10011_000,
|
|
|
|
Register::Socket5Register(_) => 0b10101_000,
|
|
Register::Socket5TxBuffer(_) => 0b10110_000,
|
|
Register::Socket5RxBuffer(_) => 0b10111_000,
|
|
|
|
Register::Socket6Register(_) => 0b11001_000,
|
|
Register::Socket6TxBuffer(_) => 0b11010_000,
|
|
Register::Socket6RxBuffer(_) => 0b11011_000,
|
|
|
|
Register::Socket7Register(_) => 0b11101_000,
|
|
Register::Socket7TxBuffer(_) => 0b11110_000,
|
|
Register::Socket7RxBuffer(_) => 0b11111_000,
|
|
}
|
|
}
|
|
|
|
/// Returns the associated address as a u16
|
|
fn address(self) -> u16 {
|
|
match self {
|
|
Register::CommonRegister(address) => address,
|
|
|
|
Register::Socket0Register(address) => address,
|
|
Register::Socket0TxBuffer(address) => address,
|
|
Register::Socket0RxBuffer(address) => address,
|
|
|
|
Register::Socket1Register(address) => address,
|
|
Register::Socket1TxBuffer(address) => address,
|
|
Register::Socket1RxBuffer(address) => address,
|
|
|
|
Register::Socket2Register(address) => address,
|
|
Register::Socket2TxBuffer(address) => address,
|
|
Register::Socket2RxBuffer(address) => address,
|
|
|
|
Register::Socket3Register(address) => address,
|
|
Register::Socket3TxBuffer(address) => address,
|
|
Register::Socket3RxBuffer(address) => address,
|
|
|
|
Register::Socket4Register(address) => address,
|
|
Register::Socket4TxBuffer(address) => address,
|
|
Register::Socket4RxBuffer(address) => address,
|
|
|
|
Register::Socket5Register(address) => address,
|
|
Register::Socket5TxBuffer(address) => address,
|
|
Register::Socket5RxBuffer(address) => address,
|
|
|
|
Register::Socket6Register(address) => address,
|
|
Register::Socket6TxBuffer(address) => address,
|
|
Register::Socket6RxBuffer(address) => address,
|
|
|
|
Register::Socket7Register(address) => address,
|
|
Register::Socket7TxBuffer(address) => address,
|
|
Register::Socket7RxBuffer(address) => address,
|
|
}
|
|
}
|
|
}
|