Adapt UDP to W5100

CHANGELOG.md

@@ -6,6 +6,12 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [Unreleased]
 
+## [0.6.0] - March 21st, 2025
+- [breaking] The driver now uses v0.9 of embedded-nal [@reitermarkus](https://github.com/reitermarkus) ([#66](https://github.com/kellerkindt/w5500/pull/66))
+- `DeviceState` is now publicly re-exported [@22dd5e2bdd](https://github.com/22dd5e2bdd) ([#65](https://github.com/kellerkindt/w5500/pull/65))
+
+## [0.5.0] - July 8th, 2024
+
 ### Changed
 - [breaking] The driver now uses the v1.0 of the `embedded-hal` traits.
 - [breaking] The `FourWireRef` bus and `DeviceRefMut` have been removed in favor of using

Cargo.toml

@@ -1,22 +1,25 @@
 [package]
-name = "w5500"
-version = "0.4.1"
-authors = ["Michael Watzko <michael@watzko.de>", "Jonah Dahlquist <hi@jonah.name>", "Ryan Summers <ryan.summers@vertigo-designs.com"]
-repository = "https://github.com/kellerkindt/w5500.git"
-description = "W5500 IoT Controller implementation."
-keywords = ["embedded", "w5500", "iot", "arm", "embedded-hal-driver"]
+name = "w5100"
+version = "0.1.0"
+authors = [
+	"Michael Watzko <michael@watzko.de>",
+	"Jonah Dahlquist <hi@jonah.name>",
+	"Ryan Summers <ryan.summers@vertigo-designs.com",
+	"Pascal Engélibert <tuxmain@zettascript.org>"
+]
+repository = "https://git.zoai.re/tuxmain/w5100-rs"
+description = "W5100 Ethernet driver"
+keywords = ["embedded", "w5100", "embedded-hal-driver"]
 categories = ["embedded", "hardware-support", "no-std", "network-programming"]
-license = "MIT OR Apache-2.0"
+license = "AGPL-3.0-only"
 readme = "README.md"
 edition = "2018"
 
 [features]
-no-chip-version-assertion = []
 
 [dependencies]
-byteorder = { version = "1.3.4", default-features = false }
 embedded-hal = "1"
-embedded-nal = "0.8.0"
+embedded-nal = "0.9.0"
 bit_field = "0.10"
 derive-try-from-primitive = "1"
 nb = "1.0.0"

LICENSE

@@ -0,0 +1,661 @@
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+means of facilitating copying of software.  This Corresponding Source
+shall include the Corresponding Source for any work covered by version 3
+of the GNU General Public License that is incorporated pursuant to the
+following paragraph.
+
+  Notwithstanding any other provision of this License, you have
+permission to link or combine any covered work with a work licensed
+under version 3 of the GNU General Public License into a single
+combined work, and to convey the resulting work.  The terms of this
+License will continue to apply to the part which is the covered work,
+but the work with which it is combined will remain governed by version
+3 of the GNU General Public License.
+
+  14. Revised Versions of this License.
+
+  The Free Software Foundation may publish revised and/or new versions of
+the GNU Affero General Public License from time to time.  Such new versions
+will be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+  Each version is given a distinguishing version number.  If the
+Program specifies that a certain numbered version of the GNU Affero General
+Public License "or any later version" applies to it, you have the
+option of following the terms and conditions either of that numbered
+version or of any later version published by the Free Software
+Foundation.  If the Program does not specify a version number of the
+GNU Affero General Public License, you may choose any version ever published
+by the Free Software Foundation.
+
+  If the Program specifies that a proxy can decide which future
+versions of the GNU Affero General Public License can be used, that proxy's
+public statement of acceptance of a version permanently authorizes you
+to choose that version for the Program.
+
+  Later license versions may give you additional or different
+permissions.  However, no additional obligations are imposed on any
+author or copyright holder as a result of your choosing to follow a
+later version.
+
+  15. Disclaimer of Warranty.
+
+  THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
+APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
+HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
+OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
+THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+PURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
+IS WITH YOU.  SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
+ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
+
+  16. Limitation of Liability.
+
+  IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
+THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
+GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
+USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
+DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
+PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
+EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGES.
+
+  17. Interpretation of Sections 15 and 16.
+
+  If the disclaimer of warranty and limitation of liability provided
+above cannot be given local legal effect according to their terms,
+reviewing courts shall apply local law that most closely approximates
+an absolute waiver of all civil liability in connection with the
+Program, unless a warranty or assumption of liability accompanies a
+copy of the Program in return for a fee.
+
+                     END OF TERMS AND CONDITIONS
+
+            How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU Affero General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU Affero General Public License for more details.
+
+    You should have received a copy of the GNU Affero General Public License
+    along with this program.  If not, see <https://www.gnu.org/licenses/>.
+
+Also add information on how to contact you by electronic and paper mail.
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+solutions will be better for different programs; see section 13 for the
+specific requirements.
+
+  You should also get your employer (if you work as a programmer) or school,
+if any, to sign a "copyright disclaimer" for the program, if necessary.
+For more information on this, and how to apply and follow the GNU AGPL, see
+<https://www.gnu.org/licenses/>.

README.md

@@ -1,4 +1,9 @@
-# W5500 Driver
+# W5100 Driver
+
+**Fork status**:
+* Work-in-progress fork of the crate [w5500](https://github.com/kellerkindt/w5500) for W5100. The two chips are different versions of the same design, very similar but not fully compatible. The older revision of the Arduino Ethernet Shield uses W5100, hence the need for this fork.
+* What works: receive and send UDP packets.
+* Tested on Arduino Uno with Arduino Ethernet Shield.
 
 This crate is a driver for the WIZnet W5500 chip.  The W5500 chip is a hardwired TCP/IP embedded Ethernet controller
 that enables embedded systems using SPI (Serial Peripheral Interface) to access the LAN. It is one of the
@@ -32,7 +37,7 @@ of the SPI implementation.  It must be set up to work as the W5500 chip requires
 * Clock speed: 33MHz maximum
 
 ```rust,no_run
-use embedded_nal::{IpAddr, Ipv4Addr, SocketAddr};
+use core::net::{IpAddr, Ipv4Addr, SocketAddr};
 #
 # struct Mock;
 #
@@ -50,11 +55,11 @@ use embedded_nal::UdpClientStack;
 let mut spi = Mock;
 
 let mut device = w5500::UninitializedDevice::new(w5500::bus::FourWire::new(spi))
-        .initialize_manual(
-                w5500::MacAddress::new(0, 1, 2, 3, 4, 5),
-                Ipv4Addr::new(192, 168, 86, 79),
-                w5500::Mode::default()
-        ).unwrap();
+    .initialize_manual(
+        w5500::MacAddress::new(0, 1, 2, 3, 4, 5),
+        Ipv4Addr::new(192, 168, 86, 79),
+        w5500::Mode::default()
+    ).unwrap();
 
 // Allocate a UDP socket to send data with
 let mut socket = device.socket().unwrap();
@@ -76,3 +81,15 @@ In no particular order, things to do to improve this driver.
 
 * Add support for TCP server implementations
 * Add support for DHCP
+
+## License
+
+[Support me via LiberaPay](https://liberapay.com/tuxmain/donate)
+
+Based on [w5500](https://github.com/kellerkindt/w5500) licensed under MIT/Apache, see Git history for the list of contributors.
+
+GNU AGPL v3, CopyLeft 2025 Pascal Engélibert [(why copyleft?)](https://txmn.tk/blog/why-copyleft/)
+
+This program is free software: you can redistribute it and/or modify it under the terms of the GNU Affero General Public License as published by the Free Software Foundation, version 3 of the License.  
+This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Affero General Public License for more details.  
+You should have received a copy of the GNU Affero General Public License along with this program. If not, see https://www.gnu.org/licenses/.

src/bus/four_wire.rs

@@ -5,7 +5,8 @@ use embedded_hal::spi::{ErrorType, Operation, SpiDevice};
 
 use crate::bus::Bus;
 
-const WRITE_MODE_MASK: u8 = 0b00000_1_00;
+const OPMODE_READ: u8 = 0x0f;
+const OPMODE_WRITE: u8 = 0xf0;
 
 // TODO This name is not ideal, should be renamed to VDM
 #[derive(Debug)]
@@ -27,96 +28,28 @@ impl<SPI> FourWire<SPI> {
 impl<SPI: SpiDevice> Bus for FourWire<SPI> {
     type Error = <SPI as ErrorType>::Error;
 
-    fn read_frame(&mut self, block: u8, address: u16, data: &mut [u8]) -> Result<(), SPI::Error> {
+    fn read_frame(&mut self, address: u16, data: &mut [u8]) -> Result<(), SPI::Error> {
         let address_phase = address.to_be_bytes();
-        let control_phase = block << 3;
-
-        self.spi.transaction(&mut [
-            Operation::Write(&address_phase),
-            Operation::Write(&[control_phase]),
-            Operation::TransferInPlace(data),
-        ])?;
+        for (i, byte) in data.iter_mut().enumerate() {
+            self.spi.transaction(&mut [
+                Operation::Write(&[OPMODE_READ]),
+                Operation::Write(&(address+i as u16).to_be_bytes()),
+                Operation::TransferInPlace(core::array::from_mut(byte)),
+            ])?;
+        }
 
         Ok(())
     }
 
-    fn write_frame(&mut self, block: u8, address: u16, data: &[u8]) -> Result<(), SPI::Error> {
-        let control_phase = block << 3 | WRITE_MODE_MASK;
-
-        let address_phase = address.to_be_bytes();
-        self.spi.transaction(&mut [
-            Operation::Write(&address_phase),
-            Operation::Write(&[control_phase]),
-            Operation::Write(data),
-        ])?;
+    fn write_frame(&mut self, address: u16, data: &[u8]) -> Result<(), SPI::Error> {
+        for (i, byte) in data.iter().enumerate() {
+            self.spi.transaction(&mut [
+                Operation::Write(&[OPMODE_WRITE]),
+                Operation::Write(&(address+i as u16).to_be_bytes()),
+                Operation::Write(&[*byte]),
+            ])?;
+        }
 
         Ok(())
     }
 }
-
-#[cfg(test)]
-mod test {
-    use embedded_hal_mock::eh1::spi::{Mock as SpiMock, Transaction as SpiTransaction};
-
-    use crate::{
-        bus::{four_wire::WRITE_MODE_MASK, Bus},
-        register,
-    };
-
-    use super::FourWire;
-
-    #[test]
-    fn test_read_frame() {
-        let mut actual_version = [0_u8; 1];
-        let mut expected_version = 5;
-
-        let expectations = [
-            SpiTransaction::transaction_start(),
-            SpiTransaction::write_vec(register::common::VERSION.to_be_bytes().to_vec()),
-            SpiTransaction::write(register::COMMON << 3),
-            SpiTransaction::transfer_in_place(actual_version.to_vec(), vec![expected_version]),
-            SpiTransaction::transaction_end(),
-        ];
-
-        let mock_spi = SpiMock::new(&expectations);
-
-        let mut four_wire = FourWire::new(mock_spi);
-
-        four_wire.read_frame(
-            register::COMMON,
-            register::common::VERSION,
-            &mut actual_version,
-        );
-
-        four_wire.release().done();
-
-        assert_eq!(expected_version, actual_version[0]);
-    }
-
-    #[test]
-    fn test_write_frame() {
-        let socket_0_reg = 0x01_u8;
-        let socket_1_reg = 0x05_u8;
-        let source_port = 49849_u16;
-
-        let expectations = [
-            SpiTransaction::transaction_start(),
-            SpiTransaction::write_vec(register::socketn::SOURCE_PORT.to_be_bytes().to_vec()),
-            SpiTransaction::write(socket_1_reg << 3 | WRITE_MODE_MASK),
-            SpiTransaction::write_vec(source_port.to_be_bytes().to_vec()),
-            SpiTransaction::transaction_end(),
-        ];
-
-        let mock_spi = SpiMock::new(&expectations);
-
-        let mut four_wire = FourWire::new(mock_spi);
-
-        four_wire.write_frame(
-            socket_1_reg,
-            register::socketn::SOURCE_PORT,
-            &source_port.to_be_bytes(),
-        );
-
-        four_wire.release().done();
-    }
-}

src/bus/mod.rs

@@ -1,16 +1,13 @@
 use core::fmt::Debug;
 
 mod four_wire;
-mod three_wire;
 
 pub use self::four_wire::FourWire;
-pub use self::three_wire::ThreeWire;
-pub use self::three_wire::ThreeWireError;
 
 pub trait Bus {
     type Error: Debug;
 
-    fn read_frame(&mut self, block: u8, address: u16, data: &mut [u8]) -> Result<(), Self::Error>;
+    fn read_frame(&mut self, address: u16, data: &mut [u8]) -> Result<(), Self::Error>;
 
-    fn write_frame(&mut self, block: u8, address: u16, data: &[u8]) -> Result<(), Self::Error>;
+    fn write_frame(&mut self, address: u16, data: &[u8]) -> Result<(), Self::Error>;
 }

src/bus/three_wire.rs

@@ -1,127 +0,0 @@
-#![allow(clippy::inconsistent_digit_grouping, clippy::unusual_byte_groupings)]
-
-use core::fmt;
-use embedded_hal::spi::{ErrorType, Operation, SpiBus};
-
-use crate::bus::Bus;
-
-const WRITE_MODE_MASK: u8 = 0b00000_1_0;
-
-const FIXED_DATA_LENGTH_MODE_1: u8 = 0b000000_01;
-const FIXED_DATA_LENGTH_MODE_2: u8 = 0b000000_10;
-const FIXED_DATA_LENGTH_MODE_4: u8 = 0b000000_11;
-
-// TODO This name is not ideal, should be renamed to FDM
-#[derive(Debug)]
-#[cfg_attr(feature = "defmt", derive(defmt::Format))]
-pub struct ThreeWire<SPI> {
-    spi: SPI,
-}
-
-impl<SPI> ThreeWire<SPI> {
-    pub fn new(spi: SPI) -> Self {
-        Self { spi }
-    }
-
-    pub fn release(self) -> SPI {
-        self.spi
-    }
-}
-
-impl<SPI: SpiBus> Bus for ThreeWire<SPI> {
-    type Error = <SPI as ErrorType>::Error;
-
-    /// Transfers a frame with an arbitrary data length in FDM
-    ///
-    /// This is done by passing chunks of fixed length 4, 2, or 1.  For example if a frame looks like this:
-    ///
-    /// (address 23) 0xF0 0xAB 0x83 0xB2 0x44 0x2C 0xAA
-    ///
-    /// This will be sent as separate frames in the chunks
-    ///
-    /// (address 23) 0xF0 0xAB 0x83 0xB2
-    /// (address 27) 44 2C
-    /// (address 29) AA
-    fn read_frame(
-        &mut self,
-        block: u8,
-        mut address: u16,
-        data: &mut [u8],
-    ) -> Result<(), Self::Error> {
-        let mut control_phase = block << 3;
-
-        let mut data_phase = data;
-        let mut last_length_written: u16;
-        while !data_phase.is_empty() {
-            if data_phase.len() >= 4 {
-                control_phase |= FIXED_DATA_LENGTH_MODE_4;
-                last_length_written = 4;
-            } else if data_phase.len() >= 2 {
-                control_phase |= FIXED_DATA_LENGTH_MODE_2;
-                last_length_written = 2;
-            } else {
-                control_phase |= FIXED_DATA_LENGTH_MODE_1;
-                last_length_written = 1;
-            }
-
-            let address_phase = address.to_be_bytes();
-            self.spi
-                .write(&address_phase)
-                .and_then(|_| self.spi.write(&[control_phase]))?;
-            self.spi
-                .transfer_in_place(&mut data_phase[..last_length_written as usize])?;
-
-            address += last_length_written;
-            data_phase = &mut data_phase[last_length_written as usize..];
-        }
-        Ok(())
-    }
-
-    fn write_frame(&mut self, block: u8, mut address: u16, data: &[u8]) -> Result<(), Self::Error> {
-        let mut control_phase = block << 3 | WRITE_MODE_MASK;
-
-        let mut data_phase = data;
-        let mut last_length_written: u16;
-        while !data_phase.is_empty() {
-            if data_phase.len() >= 4 {
-                control_phase |= FIXED_DATA_LENGTH_MODE_4;
-                last_length_written = 4;
-            } else if data_phase.len() >= 2 {
-                control_phase |= FIXED_DATA_LENGTH_MODE_2;
-                last_length_written = 2;
-            } else {
-                control_phase |= FIXED_DATA_LENGTH_MODE_1;
-                last_length_written = 1;
-            }
-
-            let address_phase = address.to_be_bytes();
-            self.spi
-                .write(&address_phase)
-                .and_then(|_| self.spi.write(&[control_phase]))
-                .and_then(|_| self.spi.write(&data_phase[..last_length_written as usize]))?;
-
-            address += last_length_written;
-            data_phase = &data_phase[last_length_written as usize..];
-        }
-        Ok(())
-    }
-}
-
-// Must use map_err, ambiguity prevents From from being implemented
-pub enum ThreeWireError<TransferError, WriteError> {
-    TransferError(TransferError),
-    WriteError(WriteError),
-}
-
-impl<TransferError, WriteError> fmt::Debug for ThreeWireError<TransferError, WriteError> {
-    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(
-            f,
-            "ThreeWireError::{}",
-            match self {
-                Self::TransferError(_) => "TransferError",
-                Self::WriteError(_) => "WriteError",
-            }
-        )
-    }
-}

src/cursor.rs

@@ -40,7 +40,7 @@ where
 
         let count = self.available().min(buf.len() as u16);
         self.bus
-            .read_frame(self.sock.rx_buffer(), self.ptr, &mut buf[..count as _])?;
+            .read_frame(self.ptr, &mut buf[..count as _])?;
         Ok(self.skip(count))
     }
 
@@ -110,7 +110,7 @@ where
 
         let count = buf.len() as u16;
         self.bus
-            .write_frame(self.sock.tx_buffer(), self.ptr, &buf[..count as _])?;
+            .write_frame(self.ptr, &buf[..count as _])?;
         self.ptr = self.ptr.wrapping_add(count);
         self.size -= count;
         Ok(count)

src/device.rs

@@ -1,6 +1,6 @@
 use bit_field::BitField;
 
-use crate::bus::{Bus, FourWire, ThreeWire};
+use crate::bus::{Bus, FourWire};
 use crate::host::Host;
 use crate::net::Ipv4Addr;
 use crate::socket::Socket;
@@ -26,7 +26,7 @@ impl<E> From<E> for ResetError<E> {
 mod private {
     pub trait Sealed {}
 
-    impl<'a, T: Sealed> Sealed for &'a mut T {}
+    impl<T: Sealed> Sealed for &'_ mut T {}
 }
 
 pub trait State: private::Sealed {
@@ -73,7 +73,7 @@ impl<HostImpl: Host> State for DeviceState<HostImpl> {
     }
 }
 
-impl<'a, T: State> State for &'a mut T {
+impl<T: State> State for &'_ mut T {
     fn socket(&mut self) -> Option<Socket> {
         T::socket(self)
     }
@@ -126,65 +126,86 @@ impl<SpiBus: Bus, StateImpl: State> Device<SpiBus, StateImpl> {
     pub fn gateway(&mut self) -> Result<Ipv4Addr, SpiBus::Error> {
         let mut octets = [0u8; 4];
         self.bus
-            .read_frame(register::COMMON, register::common::GATEWAY, &mut octets)?;
+            .read_frame(register::COMMON + register::common::GATEWAY, &mut octets)?;
         Ok(Ipv4Addr::from(octets))
     }
 
     pub fn subnet_mask(&mut self) -> Result<Ipv4Addr, SpiBus::Error> {
         let mut octets = [0u8; 4];
         self.bus
-            .read_frame(register::COMMON, register::common::SUBNET_MASK, &mut octets)?;
+            .read_frame(register::COMMON + register::common::SUBNET_MASK, &mut octets)?;
         Ok(Ipv4Addr::from(octets))
     }
 
     pub fn mac(&mut self) -> Result<MacAddress, SpiBus::Error> {
         let mut mac = MacAddress::default();
         self.bus
-            .read_frame(register::COMMON, register::common::MAC, &mut mac.octets)?;
+            .read_frame(register::COMMON + register::common::MAC, &mut mac.octets)?;
         Ok(mac)
     }
 
     pub fn ip(&mut self) -> Result<Ipv4Addr, SpiBus::Error> {
         let mut octets = [0u8; 4];
         self.bus
-            .read_frame(register::COMMON, register::common::IP, &mut octets)?;
+            .read_frame(register::COMMON + register::common::IP, &mut octets)?;
         Ok(Ipv4Addr::from(octets))
     }
 
-    pub fn phy_config(&mut self) -> Result<register::common::PhyConfig, SpiBus::Error> {
-        let mut phy = [0u8];
-        self.bus
-            .read_frame(register::COMMON, register::common::PHY_CONFIG, &mut phy)?;
-        Ok(phy[0].into())
-    }
-
     #[inline]
     pub fn reset_device(&mut self) -> Result<(), SpiBus::Error> {
         // Set RST common register of the w5500
         let mode = [0b10000000];
         self.bus
-            .write_frame(register::COMMON, register::common::MODE, &mode)
+            .write_frame(register::COMMON + register::common::MODE, &mode)
     }
 
     #[inline]
     pub fn set_mode(&mut self, mode_options: Mode) -> Result<(), SpiBus::Error> {
         self.bus.write_frame(
-            register::COMMON,
+            register::COMMON +
             register::common::MODE,
             &mode_options.to_register(),
         )
     }
 
     #[inline]
-    pub fn version(&mut self) -> Result<u8, SpiBus::Error> {
-        let mut version_register = [0_u8];
-        self.bus.read_frame(
-            register::COMMON,
-            register::common::VERSION,
-            &mut version_register,
-        )?;
+    pub fn set_rx_memory_size(&mut self, val: u8) -> Result<(), SpiBus::Error> {
+        self.bus.write_frame(
+            register::COMMON +
+            register::common::RX_MEMORY_SIZE,
+            &[val],
+        )
+    }
 
-        Ok(version_register[0])
+    #[inline]
+    pub fn set_tx_memory_size(&mut self, val: u8) -> Result<(), SpiBus::Error> {
+        self.bus.write_frame(
+            register::COMMON +
+            register::common::TX_MEMORY_SIZE,
+            &[val],
+        )
+    }
+
+    #[inline]
+    pub fn get_rx_memory_size(&mut self) -> Result<u8, SpiBus::Error> {
+        let mut val = [0];
+        self.bus.read_frame(
+            register::COMMON +
+            register::common::RX_MEMORY_SIZE,
+            &mut val,
+        )?;
+        Ok(val[0])
+    }
+
+    #[inline]
+    pub fn get_tx_memory_size(&mut self) -> Result<u8, SpiBus::Error> {
+        let mut val = [0];
+        self.bus.read_frame(
+            register::COMMON +
+            register::common::TX_MEMORY_SIZE,
+            &mut val,
+        )?;
+        Ok(val[0])
     }
 
     /// Set a new value for the Retry Time-value Register.
@@ -206,7 +227,7 @@ impl<SpiBus: Bus, StateImpl: State> Device<SpiBus, StateImpl> {
     #[inline]
     pub fn set_retry_timeout(&mut self, retry_time_value: RetryTime) -> Result<(), SpiBus::Error> {
         self.bus.write_frame(
-            register::COMMON,
+            register::COMMON +
             register::common::RETRY_TIME,
             &retry_time_value.to_register(),
         )?;
@@ -223,7 +244,7 @@ impl<SpiBus: Bus, StateImpl: State> Device<SpiBus, StateImpl> {
     pub fn current_retry_timeout(&mut self) -> Result<RetryTime, SpiBus::Error> {
         let mut retry_time_register: [u8; 2] = [0, 0];
         self.bus.read_frame(
-            register::COMMON,
+            register::COMMON+
             register::common::RETRY_TIME,
             &mut retry_time_register,
         )?;
@@ -249,7 +270,7 @@ impl<SpiBus: Bus, StateImpl: State> Device<SpiBus, StateImpl> {
     /// `RCR = 0x0007`
     pub fn set_retry_count(&mut self, retry_count: u8) -> Result<(), SpiBus::Error> {
         self.bus.write_frame(
-            register::COMMON,
+            register::COMMON+
             register::common::RETRY_COUNT,
             &[retry_count],
         )?;
@@ -267,7 +288,7 @@ impl<SpiBus: Bus, StateImpl: State> Device<SpiBus, StateImpl> {
     pub fn current_retry_count(&mut self) -> Result<u8, SpiBus::Error> {
         let mut retry_count_register: [u8; 1] = [0];
         self.bus.read_frame(
-            register::COMMON,
+            register::COMMON+
             register::common::RETRY_COUNT,
             &mut retry_count_register,
         )?;

src/host/manual.rs

@@ -1,7 +1,8 @@
+use core::net::Ipv4Addr;
+
 use crate::bus::Bus;
 use crate::host::{Host, HostConfig};
 use crate::MacAddress;
-use embedded_nal::Ipv4Addr;
 
 #[derive(Debug)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]

src/host/mod.rs

@@ -1,3 +1,5 @@
+use core::net::Ipv4Addr;
+
 mod dhcp;
 mod manual;
 
@@ -6,7 +8,6 @@ pub use self::manual::Manual;
 use crate::bus::Bus;
 use crate::register;
 use crate::MacAddress;
-use embedded_nal::Ipv4Addr;
 
 #[derive(Debug)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
@@ -46,22 +47,22 @@ pub trait Host {
     ) -> Result<(), SpiBus::Error> {
         if settings.gateway != current.gateway {
             let address = settings.gateway.octets();
-            bus.write_frame(register::COMMON, register::common::GATEWAY, &address)?;
+            bus.write_frame(register::COMMON + register::common::GATEWAY, &address)?;
             current.gateway = settings.gateway;
         }
         if settings.subnet != current.subnet {
             let address = settings.subnet.octets();
-            bus.write_frame(register::COMMON, register::common::SUBNET_MASK, &address)?;
+            bus.write_frame(register::COMMON + register::common::SUBNET_MASK, &address)?;
             current.subnet = settings.subnet;
         }
         if settings.mac != current.mac {
             let address = settings.mac.octets;
-            bus.write_frame(register::COMMON, register::common::MAC, &address)?;
+            bus.write_frame(register::COMMON + register::common::MAC, &address)?;
             current.mac = settings.mac;
         }
         if settings.ip != current.ip {
             let address = settings.ip.octets();
-            bus.write_frame(register::COMMON, register::common::IP, &address)?;
+            bus.write_frame(register::COMMON + register::common::IP, &address)?;
             current.ip = settings.ip;
         }
         Ok(())

src/lib.rs

@@ -17,7 +17,7 @@ mod uninitialized_device;
 
 #[doc(inline)]
 pub use self::{
-    device::Device,
+    device::{Device, DeviceState},
     host::{Dhcp, Host, HostConfig, Manual},
     net::MacAddress,
     uninitialized_device::{InitializeError, UninitializedDevice},
@@ -25,15 +25,6 @@ pub use self::{
 
 // TODO add better docs to all public items, add unit tests.
 
-/// Settings for wake on LAN.  Allows the W5500 to optionally emit an interrupt upon receiving a packet
-#[repr(u8)]
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Eq)]
-#[cfg_attr(feature = "defmt", derive(defmt::Format))]
-pub enum OnWakeOnLan {
-    InvokeInterrupt = 0b00100000,
-    Ignore = 0b00000000,
-}
-
 /// Ping Block Mode
 ///
 /// Settings for ping.  Allows the W5500 to respond to or ignore network ping requests
@@ -59,28 +50,11 @@ pub enum ConnectionType {
     Ethernet = 0b00000000,
 }
 
-/// Force ARP
-///
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Eq)]
-#[cfg_attr(feature = "defmt", derive(defmt::Format))]
-#[repr(u8)]
-pub enum ArpResponses {
-    /// 0 : Disable Force ARP mode
-    Cache = 0b00000000,
-    /// 1 : Enable Force ARP mode
-    ///
-    /// In Force ARP mode, It forces on sending ARP Request whenever data is
-    /// sent.
-    DropAfterUse = 0b00000010,
-}
-
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Mode {
-    pub on_wake_on_lan: OnWakeOnLan,
     pub on_ping_request: OnPingRequest,
     pub connection_type: ConnectionType,
-    pub arp_responses: ArpResponses,
 }
 
 impl Mode {
@@ -90,10 +64,8 @@ impl Mode {
 
     pub fn to_u8(self) -> u8 {
         let mut register = 0;
-        register |= self.on_wake_on_lan as u8;
         register |= self.on_ping_request as u8;
         register |= self.connection_type as u8;
-        register |= self.arp_responses as u8;
 
         register
     }
@@ -102,10 +74,8 @@ impl Mode {
 impl Default for Mode {
     fn default() -> Self {
         Self {
-            on_wake_on_lan: OnWakeOnLan::Ignore,
             on_ping_request: OnPingRequest::Respond,
             connection_type: ConnectionType::Ethernet,
-            arp_responses: ArpResponses::DropAfterUse,
         }
     }
 }
@@ -119,33 +89,29 @@ mod test {
         let ping_respond_and_force_arp = Mode {
             // Bit: 7 Reset (RST) should be 0
             // Bit: 6 reserved
-            // Bit: 5 should be 0 - Disable WOL mode
-            on_wake_on_lan: crate::OnWakeOnLan::Ignore,
+            // Bit: 5 reserved
             // Bit: 4 should be 0 - Disable Ping Block Mode
             on_ping_request: crate::OnPingRequest::Respond,
             // Bit: 3 should be 0 - PPoE disabled
             connection_type: crate::ConnectionType::Ethernet,
             // Bit: 2 reserved
-            // Bit: 1 should be 0 - Disabled Force ARP
-            arp_responses: crate::ArpResponses::Cache,
-            // Bit: 0 reserved
+            // Bit: 1 address auto-increment should be 0
+            // Bit: 0 indirect bus I/F mode should be 0
         };
         assert_eq!(0b0000_0000, ping_respond_and_force_arp.to_u8());
 
         let all_enabled = Mode {
             // Bit: 7 Reset (RST) should be 0
             // Bit: 6 reserved
-            // Bit: 5 should be 1 - Enable WOL mode
-            on_wake_on_lan: crate::OnWakeOnLan::InvokeInterrupt,
+            // Bit: 5 reserved
             // Bit: 4 should be 0 - Disable Ping Block Mode
             on_ping_request: crate::OnPingRequest::Respond,
             // Bit: 3 should be 1 - PPoE enable
             connection_type: crate::ConnectionType::PPoE,
             // Bit: 2 reserved
-            // Bit: 1 should be 1 - Enable Force ARP
-            arp_responses: crate::ArpResponses::DropAfterUse,
-            // Bit: 0 reserved
+            // Bit: 1 address auto-increment should be 0
+            // Bit: 0 indirect bus I/F mode should be 0
         };
-        assert_eq!(0b0010_1010, all_enabled.to_u8());
+        assert_eq!(0b0000_1000, all_enabled.to_u8());
     }
 }

src/net.rs

@@ -12,7 +12,7 @@
 
 // TODO remove some of these constructs and use equivalents available from embedded-nal
 
-pub use embedded_nal::Ipv4Addr;
+pub use core::net::Ipv4Addr;
 
 /// MAC address struct.  Can be instantiated with `MacAddress::new`.
 ///

src/raw_device.rs

@@ -19,38 +19,22 @@ impl<SpiBus: Bus> RawDevice<SpiBus> {
     pub(crate) fn new(mut bus: SpiBus) -> Result<Self, InitializeError<SpiBus::Error>> {
         // Set the raw socket to 16KB RX/TX buffer space.
         let raw_socket = Socket::new(0);
-        bus.write_frame(raw_socket.register(), register::socketn::TXBUF_SIZE, &[16])?;
-        bus.write_frame(raw_socket.register(), register::socketn::RXBUF_SIZE, &[16])?;
-
-        // Set all socket buffers to 0KB size.
-        for socket_index in 1..8 {
-            let socket = Socket::new(socket_index);
-            bus.write_frame(socket.register(), register::socketn::TXBUF_SIZE, &[0])?;
-            bus.write_frame(socket.register(), register::socketn::RXBUF_SIZE, &[0])?;
-        }
 
         // Configure the chip in MACRAW mode with MAC filtering.
-        let mode: u8 = (1 << 7) | // MAC address filtering
+        let mode: u8 = (1 << 6) | // MAC address filtering
                        (register::socketn::Protocol::MacRaw as u8);
 
-        bus.write_frame(raw_socket.register(), register::socketn::MODE, &[mode])?;
+        bus.write_frame(raw_socket.register() + register::socketn::MODE, &[mode])?;
         raw_socket.command(&mut bus, register::socketn::Command::Open)?;
 
         Ok(Self { bus, raw_socket })
     }
 
     /// Enable one or more interrupts
-    ///
-    /// # Args
-    /// * `which` - The interrupts to enable; see `register::socketn::Interrupt`
-    ///             For instance, pass `Interrupt::Receive` to get interrupts
-    ///             on packet reception only.
-    ///
-    pub fn enable_interrupts(&mut self, which: u8) -> Result<(), SpiBus::Error> {
-        self.raw_socket.set_interrupt_mask(&mut self.bus, which)?;
+    pub fn enable_interrupts(&mut self) -> Result<(), SpiBus::Error> {
         self.bus.write_frame(
-            register::COMMON,
-            register::common::SOCKET_INTERRUPT_MASK,
+            register::COMMON +
+            register::common::INTERRUPT_MASK,
             &[1],
         )?;
         Ok(())
@@ -73,11 +57,10 @@ impl<SpiBus: Bus> RawDevice<SpiBus> {
     ///
     pub fn disable_interrupts(&mut self) -> Result<(), SpiBus::Error> {
         self.bus.write_frame(
-            register::COMMON,
-            register::common::SOCKET_INTERRUPT_MASK,
+            register::COMMON +
+            register::common::INTERRUPT_MASK,
             &[0],
         )?;
-        self.raw_socket.set_interrupt_mask(&mut self.bus, 0xFF)?;
         Ok(())
     }
 

src/register.rs

@@ -1,7 +1,7 @@
 #![allow(clippy::inconsistent_digit_grouping, clippy::unusual_byte_groupings)]
 
 // TODO change from u8 to a custom struct implementing a trait.
-pub const COMMON: u8 = 0;
+pub const COMMON: u16 = 0;
 pub mod common {
     use bit_field::BitArray;
 
@@ -19,20 +19,20 @@ pub mod common {
     /// Register: SIPR (Source IP Address Register) [R/W] [0x000F – 0x0012] [0x00]
     pub const IP: u16 = 0x0F;
 
-    /// Register: INTLEVEL (Interrupt Low Level Timer Register) [R/W] [0x0013 – 0x0014] [0x0000]
-    pub const INTERRUPT_TIMER: u16 = 0x13;
-
-    /// Register: SIMR (Socket Interrupt Mask Register) [R/W] [0x0018] [0x00]
-    pub const SOCKET_INTERRUPT_MASK: u16 = 0x18;
+    /// Register: IMR (Interrupt Mask Register) [R/W] [0x0016 – 0x001A] [0x07D0]
+    pub const INTERRUPT_MASK: u16 = 0x16;
 
     /// Register: RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
-    pub const RETRY_TIME: u16 = 0x19;
+    pub const RETRY_TIME: u16 = 0x17;
 
     /// Register: RCR (Retry Count Register) [R/W] [0x001B] [0x08]
-    pub const RETRY_COUNT: u16 = 0x1B;
+    pub const RETRY_COUNT: u16 = 0x19;
 
-    pub const PHY_CONFIG: u16 = 0x2E;
-    pub const VERSION: u16 = 0x39;
+    /// Register: RCR (Retry Count Register) [R/W] [0x001B] [0x08]
+    pub const RX_MEMORY_SIZE: u16 = 0x1A;
+
+    /// Register: RCR (Retry Count Register) [R/W] [0x001B] [0x08]
+    pub const TX_MEMORY_SIZE: u16 = 0x1B;
 
     /// A Retry Time-value
     ///
@@ -86,147 +86,8 @@ pub mod common {
             Self::from_millis(200)
         }
     }
-
-    #[derive(Default, Debug, Copy, Clone, Eq, PartialEq, Ord, PartialOrd)]
-    #[repr(u8)]
-    pub enum PhyOperationMode {
-        /// 10BT half-duplex. Auto-negotiation disabled.
-        HalfDuplex10bt = 0b000_000,
-        /// 10BT full-duplex. Auto-negotiation disabled.
-        FullDuplex10bt = 0b001_000,
-        /// 100BT half-duplex. Auto-negotiation disabled.
-        HalfDuplex100bt = 0b010_000,
-        /// 100BT full-duplex. Auto-negotiation disabled.
-        FullDuplex100bt = 0b011_000,
-        /// 100BT half-duplex. Auto-negotiation enabled.
-        HalfDuplex100btAuto = 0b100_000,
-        /// Power down mode.
-        PowerDown = 0b110_000,
-        /// All capable. Auto-negotiation enabled.
-        #[default]
-        Auto = 0b111_000,
-    }
-
-    impl From<PhyOperationMode> for u8 {
-        fn from(val: PhyOperationMode) -> u8 {
-            val as u8
-        }
-    }
-
-    #[derive(Debug, Copy, Clone, Eq, PartialEq, Ord, PartialOrd)]
-    #[repr(u8)]
-    pub enum PhySpeedStatus {
-        /// 10Mbps based.
-        Mbps10 = 0,
-        /// 100Mbps based.
-        Mbps100 = 1,
-    }
-
-    #[derive(Debug, Copy, Clone, Eq, PartialEq, Ord, PartialOrd)]
-    #[repr(u8)]
-    pub enum PhyDuplexStatus {
-        /// Half duplex.
-        HalfDuplex = 0,
-        /// Full duplex.
-        FullDuplex = 1,
-    }
-
-    #[derive(Debug, Copy, Clone, Eq, PartialEq)]
-    pub struct PhyConfig([u8; 1]);
-
-    impl PhyConfig {
-        // Link status bit position.
-        const LNK_POS: usize = 0;
-        // Speed status bit position.
-        const SPD_POS: usize = 1;
-        // Duplex status bit position.
-        const DPX_POS: usize = 2;
-        // Operation mode bit position.
-        // const OPMDC_POS = 3;
-        // Configure PHY opeartion mode bit position.
-        // const OPMD_POS = 6;
-        // Reset bit position.
-        // const RST_POS = 7;
-
-        /// PHY link status.
-        ///
-        /// `true` if the link is up, `false` if the link is down.
-        pub fn link_up(&self) -> bool {
-            self.0.get_bit(Self::LNK_POS)
-        }
-
-        /// PHY speed status.
-        pub fn speed(&self) -> PhySpeedStatus {
-            if !self.0.get_bit(Self::SPD_POS) {
-                PhySpeedStatus::Mbps10
-            } else {
-                PhySpeedStatus::Mbps100
-            }
-        }
-
-        /// PHY duplex status.
-        pub fn duplex(&self) -> PhyDuplexStatus {
-            if !self.0.get_bit(Self::DPX_POS) {
-                PhyDuplexStatus::HalfDuplex
-            } else {
-                PhyDuplexStatus::FullDuplex
-            }
-        }
-
-        /// PHY operation mode.
-        pub fn operation_mode(&self) -> PhyOperationMode {
-            match self.0[0] & 0b111_000u8 {
-                0b000_000 => PhyOperationMode::HalfDuplex10bt,
-                0b001_000 => PhyOperationMode::FullDuplex10bt,
-                0b010_000 => PhyOperationMode::HalfDuplex100bt,
-                0b011_000 => PhyOperationMode::FullDuplex100bt,
-                0b100_000 => PhyOperationMode::HalfDuplex100btAuto,
-                0b110_000 => PhyOperationMode::PowerDown,
-                0b111_000 => PhyOperationMode::Auto,
-                _ => unreachable!(),
-            }
-        }
-    }
-
-    impl core::convert::From<u8> for PhyConfig {
-        fn from(val: u8) -> Self {
-            PhyConfig([val])
-        }
-    }
 }
 
-pub const SOCKET0: u8 = 0b000_00001;
-pub const SOCKET0_BUFFER_TX: u8 = 0b000_00010;
-pub const SOCKET0_BUFFER_RX: u8 = 0b000_00011;
-
-pub const SOCKET1: u8 = 0b000_00101;
-pub const SOCKET1_BUFFER_TX: u8 = 0b000_00110;
-pub const SOCKET1_BUFFER_RX: u8 = 0b000_00111;
-
-pub const SOCKET2: u8 = 0b000_01001;
-pub const SOCKET2_BUFFER_TX: u8 = 0b000_01010;
-pub const SOCKET2_BUFFER_RX: u8 = 0b000_01011;
-
-pub const SOCKET3: u8 = 0b000_01101;
-pub const SOCKET3_BUFFER_TX: u8 = 0b000_01110;
-pub const SOCKET3_BUFFER_RX: u8 = 0b000_01111;
-
-pub const SOCKET4: u8 = 0b000_10001;
-pub const SOCKET4_BUFFER_TX: u8 = 0b000_10010;
-pub const SOCKET4_BUFFER_RX: u8 = 0b000_10011;
-
-pub const SOCKET5: u8 = 0b000_10101;
-pub const SOCKET5_BUFFER_TX: u8 = 0b000_10110;
-pub const SOCKET5_BUFFER_RX: u8 = 0b000_10111;
-
-pub const SOCKET6: u8 = 0b000_11001;
-pub const SOCKET6_BUFFER_TX: u8 = 0b000_11010;
-pub const SOCKET6_BUFFER_RX: u8 = 0b000_11011;
-
-pub const SOCKET7: u8 = 0b000_11101;
-pub const SOCKET7_BUFFER_TX: u8 = 0b000_11110;
-pub const SOCKET7_BUFFER_RX: u8 = 0b000_11111;
-
 pub mod socketn {
     use derive_try_from_primitive::TryFromPrimitive;
 
@@ -239,7 +100,9 @@ pub mod socketn {
         Closed = 0b00,
         Tcp = 0b01,
         Udp = 0b10,
+        IpRaw = 0b11,
         MacRaw = 0b100,
+        PPoE = 0b101,
     }
 
     /// Socket n Command Register
@@ -287,7 +150,7 @@ pub mod socketn {
     /// | 0 | CON | Sn_IR(CON) | Interrupt Mask |
     #[repr(u8)]
     pub enum Interrupt {
-        All = 0b11111111u8,
+        All = 0b11111u8,
         SendOk = 0b10000u8,
         Timeout = 0b1000u8,
 
@@ -339,7 +202,9 @@ pub mod socketn {
         Established = 0x17,
         CloseWait = 0x1c,
         Udp = 0x22,
+        IpRaw = 0x32,
         MacRaw = 0x42,
+        PPoE = 0x5f,
 
         // Transient states.
         SynSent = 0x15,
@@ -348,6 +213,7 @@ pub mod socketn {
         Closing = 0x1a,
         TimeWait = 0x1b,
         LastAck = 0x1d,
+        Arp = 0x01,
     }
 
     #[cfg(feature = "defmt")]
@@ -369,22 +235,6 @@ pub mod socketn {
 
     pub const DESTINATION_PORT: u16 = 0x10;
 
-    pub const RXBUF_SIZE: u16 = 0x1E;
-
-    /// Socket n TX Buffer Size Register
-    ///
-    /// `Sn_TXBUF_SIZE`
-    ///
-    /// From datasheet:
-    ///
-    /// > .. can be configured with 1,2,4,8, and 16 Kbytes.
-    /// >
-    /// > Although Socket n TX Buffer Block size is initially configured to 2Kbytes, user can
-    /// > be re-configure its size using Sn_TXBUF_SIZE. The total sum of Sn_TXBUF_SIZE
-    /// > cannot be exceed 16Kbytes. When exceeded, the data transmission error is
-    /// > occurred.
-    pub const TXBUF_SIZE: u16 = 0x1F;
-
     /// TX Free Size Register
     ///
     /// `Sn_TX_FSR`
@@ -418,14 +268,14 @@ pub mod socketn {
     /// > It should be read or to be updated like as follows.
     /// > 1. Read the starting address for saving the transmitting data.
     /// > 2. Save the transmitting data from the starting address of Socket n TX
-    /// > buffer.
+    /// >    buffer.
     /// > 3. After saving the transmitting data, update Sn_TX_WR to the
-    /// > increased value as many as transmitting data size. If the increment value
-    /// > exceeds the maximum value 0xFFFF(greater than 0x10000 and the carry
-    /// > bit occurs), then the carry bit is ignored and will automatically update
-    /// > with the lower 16bits value.
+    /// >    increased value as many as transmitting data size. If the increment value
+    /// >    exceeds the maximum value 0xFFFF(greater than 0x10000 and the carry
+    /// >    bit occurs), then the carry bit is ignored and will automatically update
+    /// >    with the lower 16bits value.
     /// > 4. Transmit the saved data in Socket n TX Buffer by using SEND/SEND
-    /// command
+    /// >    command
     pub const TX_DATA_WRITE_POINTER: u16 = 0x24;
 
     /// Socket n Received Size Register
@@ -435,12 +285,6 @@ pub mod socketn {
 
     pub const RX_DATA_READ_POINTER: u16 = 0x28;
 
-    /// Socket n Interrupt Mask
-    ///
-    /// offset (register)
-    /// 0x002C (Sn_IMR)
-    pub const INTERRUPT_MASK: u16 = 0x2C;
-
     #[cfg(test)]
     mod tests {
         use core::convert::TryFrom;

src/socket.rs

@@ -1,46 +1,25 @@
+use core::convert::TryFrom;
+use core::net::Ipv4Addr;
+
 use crate::bus::Bus;
-use crate::register::socketn;
-use embedded_nal::Ipv4Addr;
+use crate::register::{self, socketn};
 
 #[derive(Debug)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Socket {
     pub index: u8,
-    register: u8,
-    tx_buffer: u8,
-    rx_buffer: u8,
 }
 
 impl Socket {
-    /// 8 sockets available on the w5500
+    /// 4 sockets available on the w5100
     pub fn new(index: u8) -> Self {
-        /*
-         * Socket 0 is at address    0x01
-         * Socket 0 TX is at address 0x02
-         * Socket 0 RX is at address 0x03
-         * skip                      0x04
-         * Socket 1 is at address    0x05
-         * Socket 1 TX is at address 0x06
-         * Socket 1 RX is at address 0x07
-         * ...
-         */
-        let block = index * 4;
         Socket {
             index,
-            register: block + 1,
-            tx_buffer: block + 2,
-            rx_buffer: block + 3,
         }
     }
 
-    pub fn register(&self) -> u8 {
-        self.register
-    }
-    pub fn tx_buffer(&self) -> u8 {
-        self.tx_buffer
-    }
-    pub fn rx_buffer(&self) -> u8 {
-        self.rx_buffer
+    pub fn register(&self) -> u16 {
+        self.index as u16 * 0x100 + 0x400
     }
 
     pub fn set_mode<SpiBus: Bus>(
@@ -49,13 +28,22 @@ impl Socket {
         mode: socketn::Protocol,
     ) -> Result<(), SpiBus::Error> {
         let mode = [mode as u8];
-        bus.write_frame(self.register(), socketn::MODE, &mode)?;
+        bus.write_frame(self.register() + socketn::MODE, &mode)?;
         Ok(())
     }
 
+    pub fn get_mode<SpiBus: Bus>(
+        &self,
+        bus: &mut SpiBus,
+    ) -> Result<u8, SpiBus::Error> {
+        let mut mode = [0];
+        bus.write_frame(self.register() + socketn::MODE, &mut mode)?;
+        Ok(mode[0])
+    }
+
     pub fn get_status<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u8, SpiBus::Error> {
         let mut data = [0u8];
-        bus.read_frame(self.register(), socketn::STATUS, &mut data)?;
+        bus.read_frame(self.register() + socketn::STATUS, &mut data)?;
         Ok(data[0])
     }
 
@@ -65,7 +53,7 @@ impl Socket {
         code: socketn::Interrupt,
     ) -> Result<(), SpiBus::Error> {
         let data = [code as u8];
-        bus.write_frame(self.register(), socketn::INTERRUPT, &data)?;
+        bus.write_frame(self.register() + socketn::INTERRUPT, &data)?;
         Ok(())
     }
 
@@ -75,7 +63,7 @@ impl Socket {
         code: socketn::Interrupt,
     ) -> Result<bool, SpiBus::Error> {
         let mut data = [0u8];
-        bus.read_frame(self.register(), socketn::INTERRUPT, &mut data)?;
+        bus.read_frame(self.register() + socketn::INTERRUPT, &mut data)?;
 
         Ok(data[0] & code as u8 != 0)
     }
@@ -86,17 +74,26 @@ impl Socket {
         port: u16,
     ) -> Result<(), SpiBus::Error> {
         let data = port.to_be_bytes();
-        bus.write_frame(self.register(), socketn::SOURCE_PORT, &data)?;
+        bus.write_frame(self.register() + socketn::SOURCE_PORT, &data)?;
         Ok(())
     }
 
+    pub fn get_source_port<SpiBus: Bus>(
+        &self,
+        bus: &mut SpiBus,
+    ) -> Result<u16, SpiBus::Error> {
+        let mut data = [0; 2];
+        bus.read_frame(self.register() + socketn::SOURCE_PORT, &mut data)?;
+        Ok(u16::from_be_bytes(data))
+    }
+
     pub fn set_destination_ip<SpiBus: Bus>(
         &self,
         bus: &mut SpiBus,
         ip: Ipv4Addr,
     ) -> Result<(), SpiBus::Error> {
         let data = ip.octets();
-        bus.write_frame(self.register(), socketn::DESTINATION_IP, &data)?;
+        bus.write_frame(self.register() + socketn::DESTINATION_IP, &data)?;
         Ok(())
     }
 
@@ -106,13 +103,13 @@ impl Socket {
         port: u16,
     ) -> Result<(), SpiBus::Error> {
         let data = port.to_be_bytes();
-        bus.write_frame(self.register(), socketn::DESTINATION_PORT, &data)?;
+        bus.write_frame(self.register() + socketn::DESTINATION_PORT, &data)?;
         Ok(())
     }
 
     pub fn get_tx_read_pointer<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
         let mut data = [0u8; 2];
-        bus.read_frame(self.register(), socketn::TX_DATA_READ_POINTER, &mut data)?;
+        bus.read_frame(self.register() + socketn::TX_DATA_READ_POINTER, &mut data)?;
         Ok(u16::from_be_bytes(data))
     }
 
@@ -122,7 +119,7 @@ impl Socket {
         pointer: u16,
     ) -> Result<(), SpiBus::Error> {
         let data = pointer.to_be_bytes();
-        bus.write_frame(self.register(), socketn::TX_DATA_READ_POINTER, &data)?;
+        bus.write_frame(self.register() + socketn::TX_DATA_READ_POINTER, &data)?;
         Ok(())
     }
 
@@ -131,7 +128,7 @@ impl Socket {
         bus: &mut SpiBus,
     ) -> Result<u16, SpiBus::Error> {
         let mut data = [0u8; 2];
-        bus.read_frame(self.register(), socketn::TX_DATA_WRITE_POINTER, &mut data)?;
+        bus.read_frame(self.register() + socketn::TX_DATA_WRITE_POINTER, &mut data)?;
         Ok(u16::from_be_bytes(data))
     }
 
@@ -141,13 +138,13 @@ impl Socket {
         pointer: u16,
     ) -> Result<(), SpiBus::Error> {
         let data = pointer.to_be_bytes();
-        bus.write_frame(self.register(), socketn::TX_DATA_WRITE_POINTER, &data)?;
+        bus.write_frame(self.register() + socketn::TX_DATA_WRITE_POINTER, &data)?;
         Ok(())
     }
 
     pub fn get_rx_read_pointer<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
         let mut data = [0u8; 2];
-        bus.read_frame(self.register(), socketn::RX_DATA_READ_POINTER, &mut data)?;
+        bus.read_frame(self.register() + socketn::RX_DATA_READ_POINTER, &mut data)?;
         Ok(u16::from_be_bytes(data))
     }
 
@@ -157,19 +154,31 @@ impl Socket {
         pointer: u16,
     ) -> Result<(), SpiBus::Error> {
         let data = pointer.to_be_bytes();
-        bus.write_frame(self.register(), socketn::RX_DATA_READ_POINTER, &data)?;
+        bus.write_frame(self.register() + socketn::RX_DATA_READ_POINTER, &data)?;
         Ok(())
     }
 
-    pub fn set_interrupt_mask<SpiBus: Bus>(
+    pub fn enable_interrupts<SpiBus: Bus>(
         &self,
         bus: &mut SpiBus,
-        mask: u8,
     ) -> Result<(), SpiBus::Error> {
-        let data = [mask];
-        bus.write_frame(self.register(), socketn::INTERRUPT_MASK, &data)?;
-        Ok(())
-    }
+        let mut data = [0];
+        bus.read_frame(register::COMMON + register::common::INTERRUPT_MASK, &mut data)?;
+        data[0] |= 1 << self.index;
+        bus.write_frame(register::COMMON + register::common::INTERRUPT_MASK, &data)?;
+         Ok(())
+     }
+
+    pub fn disable_interrupts<SpiBus: Bus>(
+        &self,
+        bus: &mut SpiBus,
+    ) -> Result<(), SpiBus::Error> {
+        let mut data = [0];
+        bus.read_frame(register::COMMON + register::common::INTERRUPT_MASK, &mut data)?;
+        data[0] &= !(1 << self.index);
+        bus.write_frame(register::COMMON + register::common::INTERRUPT_MASK, &data)?;
+         Ok(())
+     }
 
     pub fn command<SpiBus: Bus>(
         &self,
@@ -177,7 +186,7 @@ impl Socket {
         command: socketn::Command,
     ) -> Result<(), SpiBus::Error> {
         let data = [command as u8];
-        bus.write_frame(self.register(), socketn::COMMAND, &data)?;
+        bus.write_frame(self.register() + socketn::COMMAND, &data)?;
         Ok(())
     }
 
@@ -187,9 +196,9 @@ impl Socket {
     pub fn get_receive_size<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
         loop {
             let mut sample_0 = [0u8; 2];
-            bus.read_frame(self.register(), socketn::RECEIVED_SIZE, &mut sample_0)?;
+            bus.read_frame(self.register() + socketn::RECEIVED_SIZE, &mut sample_0)?;
             let mut sample_1 = [0u8; 2];
-            bus.read_frame(self.register(), socketn::RECEIVED_SIZE, &mut sample_1)?;
+            bus.read_frame(self.register() + socketn::RECEIVED_SIZE, &mut sample_1)?;
             if sample_0 == sample_1 {
                 break Ok(u16::from_be_bytes(sample_0));
             }
@@ -201,89 +210,7 @@ impl Socket {
     /// It's cleared once we `SEND` the buffer over the socket.
     pub fn get_tx_free_size<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
         let mut data = [0; 2];
-        bus.read_frame(self.register(), socketn::TX_FREE_SIZE, &mut data)?;
+        bus.read_frame(self.register() + socketn::TX_FREE_SIZE, &mut data)?;
         Ok(u16::from_be_bytes(data))
     }
 }
-
-#[cfg(test)]
-mod test {
-    use crate::register::*;
-
-    use super::*;
-
-    #[test]
-    fn test_socket_registers() {
-        // Socket 0
-        {
-            let socket_0 = Socket::new(0);
-
-            assert_eq!(socket_0.register, SOCKET0);
-            assert_eq!(socket_0.tx_buffer, SOCKET0_BUFFER_TX);
-            assert_eq!(socket_0.rx_buffer, SOCKET0_BUFFER_RX);
-        }
-
-        // Socket 1
-        {
-            let socket_1 = Socket::new(1);
-
-            assert_eq!(socket_1.register, SOCKET1);
-            assert_eq!(socket_1.tx_buffer, SOCKET1_BUFFER_TX);
-            assert_eq!(socket_1.rx_buffer, SOCKET1_BUFFER_RX);
-        }
-
-        // Socket 2
-        {
-            let socket_2 = Socket::new(2);
-
-            assert_eq!(socket_2.register, SOCKET2);
-            assert_eq!(socket_2.tx_buffer, SOCKET2_BUFFER_TX);
-            assert_eq!(socket_2.rx_buffer, SOCKET2_BUFFER_RX);
-        }
-
-        // Socket 3
-        {
-            let socket_3 = Socket::new(3);
-
-            assert_eq!(socket_3.register, SOCKET3);
-            assert_eq!(socket_3.tx_buffer, SOCKET3_BUFFER_TX);
-            assert_eq!(socket_3.rx_buffer, SOCKET3_BUFFER_RX);
-        }
-
-        // Socket 4
-        {
-            let socket_4 = Socket::new(4);
-
-            assert_eq!(socket_4.register, SOCKET4);
-            assert_eq!(socket_4.tx_buffer, SOCKET4_BUFFER_TX);
-            assert_eq!(socket_4.rx_buffer, SOCKET4_BUFFER_RX);
-        }
-
-        // Socket 5
-        {
-            let socket_5 = Socket::new(5);
-
-            assert_eq!(socket_5.register, SOCKET5);
-            assert_eq!(socket_5.tx_buffer, SOCKET5_BUFFER_TX);
-            assert_eq!(socket_5.rx_buffer, SOCKET5_BUFFER_RX);
-        }
-
-        // Socket 6
-        {
-            let socket_6 = Socket::new(6);
-
-            assert_eq!(socket_6.register, SOCKET6);
-            assert_eq!(socket_6.tx_buffer, SOCKET6_BUFFER_TX);
-            assert_eq!(socket_6.rx_buffer, SOCKET6_BUFFER_RX);
-        }
-
-        // Socket 7
-        {
-            let socket_7 = Socket::new(7);
-
-            assert_eq!(socket_7.register, SOCKET7);
-            assert_eq!(socket_7.tx_buffer, SOCKET7_BUFFER_TX);
-            assert_eq!(socket_7.rx_buffer, SOCKET7_BUFFER_RX);
-        }
-    }
-}

src/tcp.rs

@@ -1,3 +1,10 @@
+use core::{
+    convert::TryFrom,
+    net::{IpAddr, Ipv4Addr, SocketAddr, SocketAddrV4},
+};
+
+use embedded_nal::{nb, TcpClientStack, TcpError, TcpErrorKind};
+
 use crate::{
     bus::Bus,
     device::{Device, State},
@@ -5,12 +12,6 @@ use crate::{
     socket::Socket,
 };
 
-use embedded_nal::{
-    nb, IpAddr, Ipv4Addr, SocketAddr, SocketAddrV4, TcpClientStack, TcpError, TcpErrorKind,
-};
-
-use core::convert::TryFrom;
-
 #[derive(Debug)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum TcpSocketError<E: core::fmt::Debug> {
@@ -47,11 +48,7 @@ impl TcpSocket {
         self.socket.command(bus, socketn::Command::Close)?;
         self.socket.reset_interrupt(bus, socketn::Interrupt::All)?;
         self.socket.set_mode(bus, socketn::Protocol::Tcp)?;
-
-        self.socket.set_interrupt_mask(
-            bus,
-            socketn::Interrupt::SendOk as u8 & socketn::Interrupt::Timeout as u8,
-        )?;
+        self.socket.enable_interrupts(bus)?;
 
         self.socket.command(bus, socketn::Command::Open)?;
         Ok(())
@@ -65,11 +62,7 @@ impl TcpSocket {
         self.socket.reset_interrupt(bus, socketn::Interrupt::All)?;
         self.socket.set_source_port(bus, local_port)?;
         self.socket.set_mode(bus, socketn::Protocol::Tcp)?;
-
-        self.socket.set_interrupt_mask(
-            bus,
-            socketn::Interrupt::SendOk as u8 & socketn::Interrupt::Timeout as u8,
-        )?;
+        self.socket.enable_interrupts(bus)?;
 
         self.socket.command(bus, socketn::Command::Open)?;
         Ok(())
@@ -161,7 +154,7 @@ impl TcpSocket {
         let write_pointer = self.socket.get_tx_write_pointer(bus)?;
 
         // Write data into the buffer and update the writer pointer.
-        bus.write_frame(self.socket.tx_buffer(), write_pointer, write_data)?;
+        bus.write_frame(write_pointer, write_data)?;
         self.socket
             .set_tx_write_pointer(bus, write_pointer.wrapping_add(write_data.len() as u16))?;
 
@@ -203,7 +196,7 @@ impl TcpSocket {
 
         // Read from the RX ring buffer.
         let read_pointer = self.socket.get_rx_read_pointer(bus)?;
-        bus.read_frame(self.socket.rx_buffer(), read_pointer, read_buffer)?;
+        bus.read_frame(read_pointer, read_buffer)?;
         self.socket
             .set_rx_read_pointer(bus, read_pointer.wrapping_add(read_buffer.len() as u16))?;
 

src/udp.rs

@@ -1,6 +1,10 @@
-use core::{convert::TryFrom, fmt::Debug};
+use core::{
+    convert::TryFrom,
+    fmt::Debug,
+    net::{IpAddr, Ipv4Addr, SocketAddr, SocketAddrV4},
+};
 
-use embedded_nal::{nb, IpAddr, Ipv4Addr, SocketAddr, SocketAddrV4, UdpClientStack, UdpFullStack};
+use embedded_nal::{nb, UdpClientStack, UdpFullStack};
 
 use crate::{
     bus::Bus,
@@ -79,17 +83,19 @@ impl UdpSocket {
     }
 
     fn open<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<(), SpiBus::Error> {
-        self.socket.command(bus, socketn::Command::Close)?;
-        self.socket.reset_interrupt(bus, socketn::Interrupt::All)?;
-        self.socket.set_source_port(bus, self.port)?;
-        self.socket.set_mode(bus, socketn::Protocol::Udp)?;
-        self.socket.set_interrupt_mask(
-            bus,
-            socketn::Interrupt::SendOk as u8 & socketn::Interrupt::Timeout as u8,
-        )?;
-        self.socket.command(bus, socketn::Command::Open)?;
-
-        Ok(())
+        loop {
+            self.socket.command(bus, socketn::Command::Close)?;
+            self.socket.reset_interrupt(bus, socketn::Interrupt::All)?;
+            self.socket.set_source_port(bus, self.port)?;
+            self.socket.set_mode(bus, socketn::Protocol::Udp)?;
+            self.socket.enable_interrupts(
+                bus
+            )?;
+            self.socket.command(bus, socketn::Command::Open)?;
+            if self.socket.get_status(bus)? == Status::Udp as u8 {
+                return Ok(())
+            }
+        }
     }
 
     /// return the last set local port of the socket
@@ -97,6 +103,11 @@ impl UdpSocket {
         self.port
     }
 
+    /// return the last set local port of the socket
+    pub fn get_port_for_real<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
+        self.socket.get_source_port(bus)
+    }
+
     pub fn set_port<SpiBus: Bus>(
         &mut self,
         bus: &mut SpiBus,
@@ -228,17 +239,21 @@ impl UdpSocket {
             &send_buffer[..(free_size as usize)]
         };
 
-        // Append the data to the write buffer after the current write pointer.
-        let write_pointer = self.socket.get_tx_write_pointer(bus)?;
+        let offset = self.socket.get_tx_write_pointer(bus)? & 0x7ff;
+        let start_addr = offset + 0x4000 + 0x800 * self.socket.index as u16;
 
-        // Write data into the buffer and update the writer pointer.
-        bus.write_frame(self.socket.tx_buffer(), write_pointer, write_data)?;
-        // this will wrap the pointer accordingly to the TX `free_size`.
-        // safe to cast to `u16` because the maximum buffer size in w5500 is 16 KB!
-        let new_write_pointer = write_pointer.wrapping_add(write_data.len() as u16);
-        self.socket.set_tx_write_pointer(bus, new_write_pointer)?;
+        if offset as usize + write_data.len() > 0x800 {
+            let upper_size = 0x800 - offset as usize;
+            bus.write_frame(start_addr, &write_data[0..upper_size])?;
+            bus.write_frame(0x4000 + 0x800 * self.socket.index as u16, &write_data[upper_size..])?;
+        } else {
+            bus.write_frame(start_addr, write_data)?;
+        }
+
+        self.socket.set_tx_write_pointer(bus, offset.wrapping_add(write_data.len() as u16))?;
 
         self.block_send_command(bus)?;
+        self.socket.reset_interrupt(bus, socketn::Interrupt::SendOk);
 
         Ok(write_data.len())
     }
@@ -329,12 +344,12 @@ impl UdpSocket {
             Err(err) => return Err(NbError::Other(UdpSocketError::UnrecognisedStatus)),
         }
 
-        if !self
+        /*if !self
             .socket
             .has_interrupt(bus, socketn::Interrupt::Receive)?
         {
             return Err(NbError::WouldBlock);
-        }
+        }*/
 
         let rx_size = self.socket.get_receive_size(bus)? as usize;
         if rx_size == 0 {
@@ -350,12 +365,12 @@ impl UdpSocket {
         // to the end (even if wrapped) of the RX buffer.
         let read_max_size = rx_size.min(buffer_size);
 
-        // Read from the RX ring buffer.
-        let read_pointer = self.socket.get_rx_read_pointer(bus)?;
+        let offset = self.socket.get_rx_read_pointer(bus)? & 0x7ff;
+        let read_pointer = offset + 0x6000 + 0x800 * self.socket.index as u16;
 
         let mut header = [0u8; 8];
         // read enough data for the headers - remote SocketAddr & Packet size
-        bus.read_frame(self.socket.rx_buffer(), read_pointer, &mut header)?;
+        bus.read_frame(read_pointer, &mut header)?;
 
         let udp_header = UdpHeader::from_array(header);
 
@@ -372,14 +387,14 @@ impl UdpSocket {
         let read_buffer = &mut receive_buffer[..read_length];
 
         // read the rest of the packet's data that can fit in the buffer
-        bus.read_frame(self.socket.rx_buffer(), data_read_pointer, read_buffer)?;
+        bus.read_frame(data_read_pointer, read_buffer)?;
 
         // Set the RX point after the `rx_size`, truncating any bytes that the
         // `receiving_buffer` was not able to fit
         // it's safe to cast `rx_size` to u16 as the maximum RX buffer is
         // 16 KB (`16384` maximum value) < u16::MAX
         self.socket
-            .set_rx_read_pointer(bus, read_pointer.wrapping_add(rx_size as u16))?;
+            .set_rx_read_pointer(bus, offset.wrapping_add(rx_size as u16))?;
 
         // > RECV completes the processing of the received data in Socket n RX
         // > Buffer by using a RX read pointer register (Sn_RX_RD).
@@ -545,3 +560,19 @@ where
         Ok(())
     }
 }
+
+impl<SpiBus, StateImpl> Device<SpiBus, StateImpl>
+where
+    SpiBus: Bus,
+    StateImpl: State,
+{
+    pub fn get_port(&mut self, socket: &mut UdpSocket) -> Result<u16, UdpSocketError<SpiBus::Error>> {
+        Ok(socket.get_port_for_real(&mut self.bus)?)
+    }
+    pub fn get_receive_size(&mut self, socket: &mut UdpSocket) -> Result<u16, UdpSocketError<SpiBus::Error>> {
+        Ok(socket.socket.get_receive_size(&mut self.bus)?)
+    }
+    pub fn has_interrupt(&mut self, socket: &mut UdpSocket, interrupt: socketn::Interrupt) -> Result<bool, UdpSocketError<SpiBus::Error>> {
+        Ok(socket.socket.has_interrupt(&mut self.bus, interrupt)?)
+    }
+}

src/uninitialized_device.rs

@@ -1,7 +1,8 @@
-use embedded_hal::spi::SpiDevice;
-use embedded_nal::Ipv4Addr;
+use core::net::Ipv4Addr;
 
-use crate::bus::{Bus, FourWire, ThreeWire};
+use embedded_hal::spi::SpiDevice;
+
+use crate::bus::{Bus, FourWire};
 use crate::device::{Device, DeviceState};
 use crate::host::{Dhcp, Host, Manual};
 use crate::raw_device::RawDevice;
@@ -92,8 +93,6 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
         mut host: HostImpl,
         mode_options: Mode,
     ) -> Result<Device<SpiBus, DeviceState<HostImpl>>, InitializeError<SpiBus::Error>> {
-        #[cfg(not(feature = "no-chip-version-assertion"))]
-        self.assert_chip_version(0x4)?;
 
         // RESET
         self.reset()?;
@@ -109,10 +108,10 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
     ) -> Result<RawDevice<SpiBus>, InitializeError<SpiBus::Error>> {
         // Reset the device.
         self.bus
-            .write_frame(register::COMMON, register::common::MODE, &[0x80])?;
+            .write_frame(register::COMMON + register::common::MODE, &[0x80])?;
 
         self.bus
-            .write_frame(register::COMMON, register::common::MAC, &mac.octets)?;
+            .write_frame(register::COMMON + register::common::MAC, &mac.octets)?;
 
         RawDevice::new(self.bus)
     }
@@ -123,29 +122,17 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
         // Set RST common register of the w5500
         let mode = [0b10000000];
         self.bus
-            .write_frame(register::COMMON, register::common::MODE, &mode)
+            .write_frame(register::COMMON + register::common::MODE, &mode)
     }
     #[inline]
     pub fn set_mode(&mut self, mode_options: Mode) -> Result<(), SpiBus::Error> {
         self.bus.write_frame(
-            register::COMMON,
+            register::COMMON +
             register::common::MODE,
             &mode_options.to_register(),
         )
     }
 
-    #[inline]
-    pub fn version(&mut self) -> Result<u8, SpiBus::Error> {
-        let mut version_register = [0_u8];
-        self.bus.read_frame(
-            register::COMMON,
-            register::common::VERSION,
-            &mut version_register,
-        )?;
-
-        Ok(version_register[0])
-    }
-
     /// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
     ///
     /// # Example
@@ -163,7 +150,7 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
     #[inline]
     pub fn set_retry_timeout(&mut self, retry_time_value: RetryTime) -> Result<(), SpiBus::Error> {
         self.bus.write_frame(
-            register::COMMON,
+            register::COMMON +
             register::common::RETRY_TIME,
             &retry_time_value.to_register(),
         )?;
@@ -178,7 +165,7 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
     pub fn current_retry_timeout(&mut self) -> Result<RetryTime, SpiBus::Error> {
         let mut retry_time_register: [u8; 2] = [0, 0];
         self.bus.read_frame(
-            register::COMMON,
+            register::COMMON+
             register::common::RETRY_TIME,
             &mut retry_time_register,
         )?;
@@ -204,7 +191,7 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
     /// `RCR = 0x0007`
     pub fn set_retry_count(&mut self, retry_count: u8) -> Result<(), SpiBus::Error> {
         self.bus.write_frame(
-            register::COMMON,
+            register::COMMON+
             register::common::RETRY_COUNT,
             &[retry_count],
         )?;
@@ -221,25 +208,11 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
     pub fn current_retry_count(&mut self) -> Result<u8, SpiBus::Error> {
         let mut retry_count_register: [u8; 1] = [0];
         self.bus.read_frame(
-            register::COMMON,
+            register::COMMON+
             register::common::RETRY_COUNT,
             &mut retry_count_register,
         )?;
 
         Ok(retry_count_register[0])
     }
-
-    #[cfg(not(feature = "no-chip-version-assertion"))]
-    fn assert_chip_version(
-        &mut self,
-        expected_version: u8,
-    ) -> Result<(), InitializeError<SpiBus::Error>> {
-        let version = self.version()?;
-
-        if version != expected_version {
-            Err(InitializeError::ChipNotConnected)
-        } else {
-            Ok(())
-        }
-    }
 }