Added module containing new register address representations, added chip mode init/reset

src/bus/four_wire.rs

@@ -37,8 +37,8 @@ impl<Spi: FullDuplex<u8>, ChipSelect: OutputPin> ActiveBus for ActiveFourWire<Sp
     type Error = FourWireError<Spi::Error, ChipSelect::Error>;
     fn transfer_frame<'a>(
         &mut self,
-        address: u16,
         block: u8,
+        address: u16,
         is_write: bool,
         data: &'a mut [u8],
     ) -> Result<&'a mut [u8], nb::Error<Self::Error>> {

src/bus/mod.rs

@@ -16,8 +16,8 @@ pub trait ActiveBus {
 
     fn transfer_frame<'a>(
         &mut self,
-        address: u16,
         block: u8,
+        address: u16,
         is_write: bool,
         data: &'a mut [u8],
     ) -> Result<&'a mut [u8], Self::Error>;

src/bus/three_wire.rs

@@ -46,8 +46,8 @@ impl<Spi: FullDuplex<u8>> ActiveBus for ActiveThreeWire<Spi> {
     /// (address 29) AA
     fn transfer_frame<'a>(
         &mut self,
-        mut address: u16,
         block: u8,
+        mut address: u16,
         is_write: bool,
         data: &'a mut [u8],
     ) -> Result<&'a mut [u8], nb::Error<Self::Error>> {

src/lib.rs

@@ -944,3 +944,4 @@ pub mod bus;
 pub mod inactive_w5500;
 pub mod uninitialized_w5500;
 pub mod w5500;
+mod register;

src/register.rs

@@ -0,0 +1,6 @@
+
+pub const COMMON: u8 = 0;
+
+pub mod common {
+	pub const MODE: u16 = 0;
+}

src/uninitialized_w5500.rs

@@ -2,19 +2,36 @@ use bus::{ActiveBus, ActiveFourWire, ActiveThreeWire};
 use embedded_hal::digital::v2::OutputPin;
 use embedded_hal::spi::FullDuplex;
 use w5500::W5500;
+use crate::Settings;
+use register;
 
 pub struct UninitializedW5500<SpiBus: ActiveBus> {
     bus: SpiBus,
 }
 
 impl<SpiBus: ActiveBus> UninitializedW5500<SpiBus> {
-    pub fn initialize(self) -> W5500<SpiBus> {
-        // TODO actually initialize chip
-        W5500::new(self.bus)
+    pub fn initialize(mut self, settings: Settings) -> Result<W5500<SpiBus>, SpiBus::Error> {
+        self.set_mode(settings)?;
+        // TODO set up IP/etc
+        // TODO give ownership of all sockets
+        Ok(W5500::new(self.bus))
     }
     pub fn new(bus: SpiBus) -> UninitializedW5500<SpiBus> {
         UninitializedW5500 { bus: bus }
     }
+
+    fn set_mode(
+        &mut self,
+        settings: Settings,
+    ) -> Result<(), SpiBus::Error> {
+        let mut mode = [0];
+        mode[0] |= settings.on_wake_on_lan as u8;
+        mode[0] |= settings.on_ping_request as u8;
+        mode[0] |= settings.connection_type as u8;
+        mode[0] |= settings.arp_responses as u8;
+        block!(self.bus.transfer_frame(register::COMMON, register::common::MODE, true, &mut mode))?;
+        Ok(())
+    }
 }
 
 impl<Spi: FullDuplex<u8>, ChipSelect: OutputPin>

src/w5500.rs

@@ -3,6 +3,7 @@ use crate::uninitialized_w5500::UninitializedW5500;
 use bus::{ActiveBus, ActiveFourWire, ActiveThreeWire, FourWire, ThreeWire};
 use embedded_hal::digital::v2::OutputPin;
 use embedded_hal::spi::FullDuplex;
+use register;
 
 pub struct W5500<SpiBus: ActiveBus> {
     bus: SpiBus,
@@ -12,10 +13,19 @@ impl<SpiBus: ActiveBus> W5500<SpiBus> {
     pub fn new(bus: SpiBus) -> Self {
         W5500 { bus }
     }
-    pub fn reset(self) -> UninitializedW5500<SpiBus> {
-        // TODO reset chip
-        UninitializedW5500::new(self.bus)
+    pub fn reset(mut self) -> Result<UninitializedW5500<SpiBus>, SpiBus::Error> {
+        // TODO accept all sockets back
+        self.clear_mode()?;
+        Ok(UninitializedW5500::new(self.bus))
     }
+
+    fn clear_mode(&mut self) -> Result<(), SpiBus::Error> {
+        // reset bit
+        let mut mode = [0b10000000];
+        block!(self.bus.transfer_frame(register::COMMON, register::common::MODE, true, &mut mode))?;
+        Ok(())
+    }
+
     //TODO open_udp_socket
 }