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Fixed some masking issues with FourWireBus, added implementation for ThreeWireBus

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This commit is contained in:
Jonah Dahlquist 2019-08-07 20:29:23 -05:00 • committed by Jonah Dahlquist
commit aa0c69b21e
3 changed files with 80 additions and 13 deletions
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25
src/bus/four_wire.rs
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@ -4,6 +4,9 @@ use embedded_hal::spi::FullDuplex;
use crate::bus::{ActiveBus, Bus};
const WRITE_MODE_MASK: u8 = 0b11111_1_11;
const READ_MODE_MASK: u8 = 0b_11111_0_11;
pub struct FourWire<ChipSelect: OutputPin> {
cs: ChipSelect,
}
@ -34,22 +37,32 @@ impl<Spi: FullDuplex<u8>, ChipSelect: OutputPin> ActiveBus for ActiveFourWire<Sp
type Error = FourWireError<Spi::Error, ChipSelect::Error>;
fn transfer_frame<'a>(
&mut self,
address_phase: u16,
mut control_phase: u8,
data_phase: &'a mut [u8],
address: u16,
block: u8,
is_write: bool,
data: &'a mut [u8],
) -> Result<&'a mut [u8], nb::Error<Self::Error>> {
let mut address_bytes = [0u8; 2];
BigEndian::write_u16(&mut address_bytes, address_phase);
let mut control_phase = block << 3;
if is_write {
control_phase &= WRITE_MODE_MASK;
} else {
control_phase &= READ_MODE_MASK;
}
let data_phase = data;
let mut address_phase = [0u8; 2];
BigEndian::write_u16(&mut address_phase, address);
self.cs
.set_high()
.map_err(|e| Self::Error::ChipSelectError(e))?;
block!(Self::transfer_bytes(&mut self.spi, &mut address_bytes)
block!(Self::transfer_bytes(&mut self.spi, &mut address_phase)
.and_then(|_| Self::transfer_byte(&mut self.spi, &mut control_phase))
.and_then(|_| Self::transfer_bytes(&mut self.spi, data_phase)))
.map_err(|e| Self::Error::SpiError(e))?;
self.cs
.set_low()
.map_err(|e| Self::Error::ChipSelectError(e))?;
Ok(data_phase)
}
}