Added bus model and InactiveW5500 state

src/bus/four_wire.rs

@@ -1,15 +1,13 @@
 use embedded_hal::digital::v2::OutputPin;
 use embedded_hal::spi::FullDuplex;
 
-use crate::bus::Bus;
+use crate::bus::{ActiveBus, Bus};
 
 pub struct FourWire<ChipSelect: OutputPin> {
-    cs: ChipSelect
+    cs: ChipSelect,
 }
 
-impl<ChipSelect: OutputPin>
-    FourWire<ChipSelect>
-{
+impl<ChipSelect: OutputPin> FourWire<ChipSelect> {
     pub fn new(cs: ChipSelect) -> Self {
         Self { cs }
     }
@@ -18,12 +16,22 @@ impl<ChipSelect: OutputPin>
     }
 }
 
-impl<Spi: FullDuplex<u8>, ChipSelect: OutputPin> Bus<Spi>
-    for FourWire<ChipSelect>
-{
+impl<ChipSelect: OutputPin> Bus for FourWire<ChipSelect> {}
+
+impl<ChipSelect: OutputPin> FourWire<ChipSelect> {
+    pub fn activate<Spi: FullDuplex<u8>>(self, spi: Spi) -> ActiveFourWire<Spi, ChipSelect> {
+        ActiveFourWire { cs: self.cs, spi }
+    }
+}
+
+pub struct ActiveFourWire<Spi: FullDuplex<u8>, ChipSelect: OutputPin> {
+    cs: ChipSelect,
+    spi: Spi,
+}
+
+impl<Spi: FullDuplex<u8>, ChipSelect: OutputPin> ActiveBus for ActiveFourWire<Spi, ChipSelect> {
     type Error = FourWireError<Spi::Error, ChipSelect::Error>;
-    fn transfer_frame<'a, 'b>(
-        spi: &'b mut Spi,
+    fn transfer_frame<'a>(
         address_phase: [u8; 2],
         control_phase: u8,
         data_phase: &'a mut [u8],
@@ -32,6 +40,11 @@ impl<Spi: FullDuplex<u8>, ChipSelect: OutputPin> Bus<Spi>
         Ok(data_phase)
     }
 }
+impl<Spi: FullDuplex<u8>, ChipSelect: OutputPin> ActiveFourWire<Spi, ChipSelect> {
+    pub fn deactivate(self) -> (FourWire<ChipSelect>, Spi) {
+        (FourWire::new(self.cs), self.spi)
+    }
+}
 
 pub enum FourWireError<SpiError, ChipSelectError> {
     SpiError(SpiError),

src/bus/mod.rs

@@ -1,16 +1,18 @@
 use nb::Result;
-use embedded_hal::spi::FullDuplex;
 
 mod four_wire;
 mod three_wire;
 
+pub use self::four_wire::ActiveFourWire;
 pub use self::four_wire::FourWire;
+pub use self::three_wire::ActiveThreeWire;
 pub use self::three_wire::ThreeWire;
 
-pub trait Bus<Spi: FullDuplex<u8>> {
+pub trait Bus {}
+
+pub trait ActiveBus {
     type Error;
-    fn transfer_frame<'a, 'b>(
-        spi: &'b mut Spi,
+    fn transfer_frame<'a>(
         address_phase: [u8; 2],
         control_phase: u8,
         data_phase: &'a mut [u8],

src/bus/three_wire.rs

@@ -1,19 +1,30 @@
 use embedded_hal::spi::FullDuplex;
 
-use crate::bus::Bus;
+use crate::bus::{ActiveBus, Bus};
 
 pub struct ThreeWire {}
 
 impl ThreeWire {
     pub fn new() -> Self {
-        Self { }
+        Self {}
     }
 }
 
-impl<Spi: FullDuplex<u8>> Bus<Spi> for ThreeWire {
+impl Bus for ThreeWire {}
+
+impl ThreeWire {
+    pub fn activate<Spi: FullDuplex<u8>>(self, spi: Spi) -> ActiveThreeWire<Spi> {
+        ActiveThreeWire { spi }
+    }
+}
+
+pub struct ActiveThreeWire<Spi: FullDuplex<u8>> {
+    spi: Spi,
+}
+
+impl<Spi: FullDuplex<u8>> ActiveBus for ActiveThreeWire<Spi> {
     type Error = Spi::Error;
-    fn transfer_frame<'a, 'b>(
-        spi: &'b mut Spi,
+    fn transfer_frame<'a>(
         address_phase: [u8; 2],
         control_phase: u8,
         data_phase: &'a mut [u8],
@@ -22,3 +33,9 @@ impl<Spi: FullDuplex<u8>> Bus<Spi> for ThreeWire {
         Ok(data_phase)
     }
 }
+
+impl<Spi: FullDuplex<u8>> ActiveThreeWire<Spi> {
+    pub fn deactivate(self) -> (ThreeWire, Spi) {
+        (ThreeWire::new(), self.spi)
+    }
+}