Merge pull request #55 from LechevSpace/chore/socket-and-other-docs
Chore: Improve API and add docs
This commit is contained in:
commit
3da66e6eb1
4 changed files with 257 additions and 6 deletions
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@ -8,6 +8,8 @@ use crate::socket::Socket;
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use crate::uninitialized_device::UninitializedDevice;
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use crate::uninitialized_device::UninitializedDevice;
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use crate::{register, MacAddress};
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use crate::{register, MacAddress};
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#[derive(Debug, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum ResetError<E> {
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pub enum ResetError<E> {
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SocketsNotReleased,
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SocketsNotReleased,
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Other(E),
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Other(E),
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@ -21,7 +23,7 @@ impl<E> From<E> for ResetError<E> {
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#[derive(Debug)]
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#[derive(Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub(crate) struct DeviceState<HostImpl: Host> {
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pub struct DeviceState<HostImpl: Host> {
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host: HostImpl,
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host: HostImpl,
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sockets: [u8; 1],
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sockets: [u8; 1],
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}
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}
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@ -42,6 +44,10 @@ impl<SpiBus: Bus, HostImpl: Host> Device<SpiBus, HostImpl> {
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}
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}
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}
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}
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pub fn get_state(&self) -> &DeviceState<HostImpl> {
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&self.state
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}
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pub fn reset(mut self) -> Result<UninitializedDevice<SpiBus>, ResetError<SpiBus::Error>> {
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pub fn reset(mut self) -> Result<UninitializedDevice<SpiBus>, ResetError<SpiBus::Error>> {
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if self.state.sockets != [0b11111111] {
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if self.state.sockets != [0b11111111] {
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Err(ResetError::SocketsNotReleased)
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Err(ResetError::SocketsNotReleased)
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161
src/register.rs
161
src/register.rs
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@ -156,7 +156,10 @@ pub const SOCKET7_BUFFER_RX: u8 = 0b000_11111;
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pub mod socketn {
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pub mod socketn {
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use derive_try_from_primitive::TryFromPrimitive;
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use derive_try_from_primitive::TryFromPrimitive;
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/// The Protocol mode
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pub const MODE: u16 = 0x00;
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pub const MODE: u16 = 0x00;
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/// The protocol modes that can be used with the `w5500`
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#[repr(u8)]
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#[repr(u8)]
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pub enum Protocol {
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pub enum Protocol {
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Closed = 0b00,
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Closed = 0b00,
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@ -164,33 +167,100 @@ pub mod socketn {
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Udp = 0b10,
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Udp = 0b10,
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MacRaw = 0b100,
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MacRaw = 0b100,
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}
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}
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/// Socket n Command Register
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///
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/// `Sn_CR`
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pub const COMMAND: u16 = 0x01;
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pub const COMMAND: u16 = 0x01;
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/// Socket n Commands
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///
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/// `Sn_CR` register
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#[repr(u8)]
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#[repr(u8)]
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pub enum Command {
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pub enum Command {
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Open = 0x01,
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Open = 0x01,
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/// [Datasheet page 46](https://docs.wiznet.io/img/products/w5500/W5500_ds_v110e.pdf):
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///
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/// > This is valid only in TCP mode (Sn_MR(P3:P0) = Sn_MR_TCP). In this
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/// > mode, Socket n operates as a ‘TCP server’ and waits for connection-
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/// > request (SYN packet) from any ‘TCP client
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Listen = 0x02,
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Listen = 0x02,
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Connect = 0x04,
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Connect = 0x04,
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Discon = 0x08,
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Discon = 0x08,
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Close = 0x10,
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Close = 0x10,
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Send = 0x20,
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Send = 0x20,
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/// [Datasheet page 48](https://docs.wiznet.io/img/products/w5500/W5500_ds_v110e.pdf):
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///
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/// > RECV completes the processing of the received data in Socket n RX
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/// > Buffer by using a RX read pointer register (Sn_RX_RD).
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/// > For more details, refer to Socket n RX Received Size Register
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/// > (Sn_RX_RSR), Socket n RX Write Pointer Register (Sn_RX_WR), and
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/// > Socket n RX Read Pointer Register (Sn_RX_RD).
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Receive = 0x40,
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Receive = 0x40,
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}
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}
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pub const INTERRUPT: u16 = 0x02;
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pub const INTERRUPT: u16 = 0x02;
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/// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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/// | Reserved | Reserved | Reserved | SEND_OK | TIMEOUT | RECV | DISCON | CON |
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///
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/// | Bit | Symbol | Description |
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/// | 7~5 | Reserved | Reserved |
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/// | 4 | SENDOK | Sn_IR(SENDOK) | Interrupt Mask |
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/// | 3 | TIMEOUT | Sn_IR(TIMEOUT) | Interrupt Mask |
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/// | 2 | RECV | Sn_IR(RECV) | Interrupt Mask |
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/// | 1 | DISCON | Sn_IR(DISCON) | Interrupt Mask |
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/// | 0 | CON | Sn_IR(CON) | Interrupt Mask |
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#[repr(u8)]
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#[repr(u8)]
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pub enum Interrupt {
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pub enum Interrupt {
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All = 0b11111111u8,
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All = 0b11111111u8,
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SendOk = 0b010000u8,
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SendOk = 0b10000u8,
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Timeout = 0b01000u8,
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Timeout = 0b1000u8,
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Receive = 0b00100u8,
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/// Receive data
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///
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/// bit 2, symbol `RECV`, `Sn_IR(RECV) Interrupt Mask`
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Receive = 0b100u8,
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/// Disconnect
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///
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/// bit 1, symbol `DISCON`, `Sn_IR(DISCON) Interrupt Mask`
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Disconnect = 0b10u8,
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/// Connect
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///
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/// bit 0, symbol `CON`, `Sn_IR(CON) Interrupt Mask`
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Connect = 0b1u8,
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}
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}
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pub const STATUS: u16 = 0x03;
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pub const STATUS: u16 = 0x03;
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/// Socket status register
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///
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/// `W5500 Datasheet Version 1.1.0` page 49:
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///
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/// > Sn_SR (Socket n Status Register) [R] [0x0003] [0x00]
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///
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/// - 0x18 SOCK_FIN_WAIT
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/// - 0x1A SOCK_CLOSING
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/// - 0X1B SOCK_TIME_WAIT
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/// > These indicate Socket n is closing.
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/// > These are shown in disconnect-process such as active-close
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/// > and passive-close.
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/// > When Disconnect-process is successfully completed, or
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/// > when timeout occurs, these change to SOCK_CLOSED.
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///
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#[derive(TryFromPrimitive, Debug, Copy, Clone, PartialEq, Eq)]
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#[repr(u8)]
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#[repr(u8)]
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#[derive(TryFromPrimitive)]
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pub enum Status {
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pub enum Status {
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Closed = 0x00,
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Closed = 0x00,
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Init = 0x13,
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Init = 0x13,
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/// [Datasheet page 49](https://docs.wiznet.io/img/products/w5500/W5500_ds_v110e.pdf):
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///
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/// > This indicates Socket n is operating as ‘TCP server’ mode and
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/// > waiting for connection-request (SYN packet) from a peer
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/// > (‘TCP client’).
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Listen = 0x14,
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Listen = 0x14,
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Established = 0x17,
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Established = 0x17,
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CloseWait = 0x1c,
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CloseWait = 0x1c,
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@ -206,6 +276,19 @@ pub mod socketn {
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LastAck = 0x1d,
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LastAck = 0x1d,
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}
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}
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#[cfg(feature = "defmt")]
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impl defmt::Format for Status {
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fn format(&self, fmt: defmt::Formatter) {
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// Format as hexadecimal.
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defmt::write!(
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fmt,
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"Status::{} ({=u8:#x})",
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defmt::Debug2Format(self),
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*self as u8
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);
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}
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}
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pub const SOURCE_PORT: u16 = 0x04;
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pub const SOURCE_PORT: u16 = 0x04;
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pub const DESTINATION_IP: u16 = 0x0C;
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pub const DESTINATION_IP: u16 = 0x0C;
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@ -214,17 +297,87 @@ pub mod socketn {
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pub const RXBUF_SIZE: u16 = 0x1E;
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pub const RXBUF_SIZE: u16 = 0x1E;
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/// Socket n TX Buffer Size Register
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///
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/// `Sn_TXBUF_SIZE`
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///
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/// From datasheet:
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///
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/// > .. can be configured with 1,2,4,8, and 16 Kbytes.
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/// >
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/// > Although Socket n TX Buffer Block size is initially configured to 2Kbytes, user can
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/// > be re-configure its size using Sn_TXBUF_SIZE. The total sum of Sn_TXBUF_SIZE
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/// > cannot be exceed 16Kbytes. When exceeded, the data transmission error is
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/// > occurred.
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pub const TXBUF_SIZE: u16 = 0x1F;
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pub const TXBUF_SIZE: u16 = 0x1F;
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/// TX Free Size Register
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///
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/// `Sn_TX_FSR`
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///
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/// Socket n TX Free Size
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///
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/// offset (register)
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/// 0x0020 (Sn_TX_FSR0)
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/// 0x0021 (Sn_TX_FSR1)
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pub const TX_FREE_SIZE: u16 = 0x20;
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pub const TX_FREE_SIZE: u16 = 0x20;
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/// Socket n TX Read Pointer
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///
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/// offset (register)
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/// 0x0022 (Sn_TX_RD0)
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/// 0x0023 (Sn_TX_RD1)
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pub const TX_DATA_READ_POINTER: u16 = 0x22;
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pub const TX_DATA_READ_POINTER: u16 = 0x22;
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/// Socket n TX Write Pointer
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///
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/// offset (register)
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/// 0x0024 (Sn_TX_WR0)
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/// 0x0025 (Sn_TX_WR1)
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///
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/// [Datasheet page 54](https://docs.wiznet.io/img/products/w5500/W5500_ds_v110e.pdf):
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///
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/// > Sn_TX_WR (Socket n TX Write Pointer Register) [R/W] [0x0024-0x0025] [0x0000]
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/// >
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/// > Sn_TX_WR is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP
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/// > mode(‘0001’), it is re-initialized while connecting with TCP.
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/// > It should be read or to be updated like as follows.
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/// > 1. Read the starting address for saving the transmitting data.
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/// > 2. Save the transmitting data from the starting address of Socket n TX
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/// > buffer.
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/// > 3. After saving the transmitting data, update Sn_TX_WR to the
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/// > increased value as many as transmitting data size. If the increment value
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/// > exceeds the maximum value 0xFFFF(greater than 0x10000 and the carry
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/// > bit occurs), then the carry bit is ignored and will automatically update
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/// > with the lower 16bits value.
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/// > 4. Transmit the saved data in Socket n TX Buffer by using SEND/SEND
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/// command
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pub const TX_DATA_WRITE_POINTER: u16 = 0x24;
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pub const TX_DATA_WRITE_POINTER: u16 = 0x24;
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/// Socket n Received Size Register
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///
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/// `Sn_RX_RSR`
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pub const RECEIVED_SIZE: u16 = 0x26;
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pub const RECEIVED_SIZE: u16 = 0x26;
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pub const RX_DATA_READ_POINTER: u16 = 0x28;
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pub const RX_DATA_READ_POINTER: u16 = 0x28;
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/// Socket n Interrupt Mask
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///
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/// offset (register)
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/// 0x002C (Sn_IMR)
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pub const INTERRUPT_MASK: u16 = 0x2C;
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pub const INTERRUPT_MASK: u16 = 0x2C;
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#[cfg(test)]
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mod tests {
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use core::convert::TryFrom;
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use super::Status;
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#[test]
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fn test_status_from_byte() {
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let udp = 0x22_u8;
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let status = Status::try_from(udp).expect("Should parse to Status");
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assert_eq!(status, Status::Udp);
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}
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}
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}
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}
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@ -12,6 +12,7 @@ pub struct Socket {
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}
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}
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impl Socket {
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impl Socket {
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/// 8 sockets available on the w5500
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pub fn new(index: u8) -> Self {
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pub fn new(index: u8) -> Self {
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/*
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/*
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* Socket 0 is at address 0x01
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* Socket 0 is at address 0x01
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@ -75,6 +76,7 @@ impl Socket {
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) -> Result<bool, SpiBus::Error> {
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) -> Result<bool, SpiBus::Error> {
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let mut data = [0u8];
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let mut data = [0u8];
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bus.read_frame(self.register(), socketn::INTERRUPT, &mut data)?;
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bus.read_frame(self.register(), socketn::INTERRUPT, &mut data)?;
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Ok(data[0] & code as u8 != 0)
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Ok(data[0] & code as u8 != 0)
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}
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}
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@ -179,9 +181,11 @@ impl Socket {
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Ok(())
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Ok(())
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}
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}
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/// Get the received bytes size of the socket's RX buffer.
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///
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/// Section 4.2 of datasheet, Sn_TX_FSR address docs indicate that read must be repeated until two sequential reads are stable
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pub fn get_receive_size<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
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pub fn get_receive_size<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
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loop {
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loop {
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// Section 4.2 of datasheet, Sn_TX_FSR address docs indicate that read must be repeated until two sequential reads are stable
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let mut sample_0 = [0u8; 2];
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let mut sample_0 = [0u8; 2];
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bus.read_frame(self.register(), socketn::RECEIVED_SIZE, &mut sample_0)?;
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bus.read_frame(self.register(), socketn::RECEIVED_SIZE, &mut sample_0)?;
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let mut sample_1 = [0u8; 2];
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let mut sample_1 = [0u8; 2];
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@ -192,9 +196,94 @@ impl Socket {
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}
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}
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}
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}
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/// Get the free TX buffer size still available for this socket.
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///
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/// It's cleared once we `SEND` the buffer over the socket.
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pub fn get_tx_free_size<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
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pub fn get_tx_free_size<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
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let mut data = [0; 2];
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let mut data = [0; 2];
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bus.read_frame(self.register(), socketn::TX_FREE_SIZE, &mut data)?;
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bus.read_frame(self.register(), socketn::TX_FREE_SIZE, &mut data)?;
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Ok(u16::from_be_bytes(data))
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Ok(u16::from_be_bytes(data))
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}
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}
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}
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}
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#[cfg(test)]
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mod test {
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use crate::register::*;
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use super::*;
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#[test]
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fn test_socket_registers() {
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// Socket 0
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{
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let socket_0 = Socket::new(0);
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assert_eq!(socket_0.register, SOCKET0);
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assert_eq!(socket_0.tx_buffer, SOCKET0_BUFFER_TX);
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assert_eq!(socket_0.rx_buffer, SOCKET0_BUFFER_RX);
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}
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// Socket 1
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{
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let socket_1 = Socket::new(1);
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assert_eq!(socket_1.register, SOCKET1);
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assert_eq!(socket_1.tx_buffer, SOCKET1_BUFFER_TX);
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assert_eq!(socket_1.rx_buffer, SOCKET1_BUFFER_RX);
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}
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// Socket 2
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{
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let socket_2 = Socket::new(2);
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assert_eq!(socket_2.register, SOCKET2);
|
||||||
|
assert_eq!(socket_2.tx_buffer, SOCKET2_BUFFER_TX);
|
||||||
|
assert_eq!(socket_2.rx_buffer, SOCKET2_BUFFER_RX);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Socket 3
|
||||||
|
{
|
||||||
|
let socket_3 = Socket::new(3);
|
||||||
|
|
||||||
|
assert_eq!(socket_3.register, SOCKET3);
|
||||||
|
assert_eq!(socket_3.tx_buffer, SOCKET3_BUFFER_TX);
|
||||||
|
assert_eq!(socket_3.rx_buffer, SOCKET3_BUFFER_RX);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Socket 4
|
||||||
|
{
|
||||||
|
let socket_4 = Socket::new(4);
|
||||||
|
|
||||||
|
assert_eq!(socket_4.register, SOCKET4);
|
||||||
|
assert_eq!(socket_4.tx_buffer, SOCKET4_BUFFER_TX);
|
||||||
|
assert_eq!(socket_4.rx_buffer, SOCKET4_BUFFER_RX);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Socket 5
|
||||||
|
{
|
||||||
|
let socket_5 = Socket::new(5);
|
||||||
|
|
||||||
|
assert_eq!(socket_5.register, SOCKET5);
|
||||||
|
assert_eq!(socket_5.tx_buffer, SOCKET5_BUFFER_TX);
|
||||||
|
assert_eq!(socket_5.rx_buffer, SOCKET5_BUFFER_RX);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Socket 6
|
||||||
|
{
|
||||||
|
let socket_6 = Socket::new(6);
|
||||||
|
|
||||||
|
assert_eq!(socket_6.register, SOCKET6);
|
||||||
|
assert_eq!(socket_6.tx_buffer, SOCKET6_BUFFER_TX);
|
||||||
|
assert_eq!(socket_6.rx_buffer, SOCKET6_BUFFER_RX);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Socket 7
|
||||||
|
{
|
||||||
|
let socket_7 = Socket::new(7);
|
||||||
|
|
||||||
|
assert_eq!(socket_7.register, SOCKET7);
|
||||||
|
assert_eq!(socket_7.tx_buffer, SOCKET7_BUFFER_TX);
|
||||||
|
assert_eq!(socket_7.rx_buffer, SOCKET7_BUFFER_RX);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
|
||||||
|
|
@ -58,6 +58,9 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
|
||||||
self.initialize_with_host(host, mode_options)
|
self.initialize_with_host(host, mode_options)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// The gateway overrides the passed `ip` ([`Ip4Addr`]) to end with `.1`.
|
||||||
|
///
|
||||||
|
/// E.g. `let ip = "192.168.0.201".parse::<Ip4Addr>()` will become a device with a gateway `192.168.0.1`.
|
||||||
pub fn initialize_manual(
|
pub fn initialize_manual(
|
||||||
self,
|
self,
|
||||||
mac: MacAddress,
|
mac: MacAddress,
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue