chore: Bus move default impls to device & uninit device
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
This commit is contained in:
parent
360496e4a9
commit
29f531387d
3 changed files with 142 additions and 162 deletions
103
src/bus/mod.rs
103
src/bus/mod.rs
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@ -23,109 +23,6 @@ pub trait Bus {
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fn read_frame(&mut self, block: u8, address: u16, data: &mut [u8]) -> Result<(), Self::Error>;
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fn read_frame(&mut self, block: u8, address: u16, data: &mut [u8]) -> Result<(), Self::Error>;
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fn write_frame(&mut self, block: u8, address: u16, data: &[u8]) -> Result<(), Self::Error>;
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fn write_frame(&mut self, block: u8, address: u16, data: &[u8]) -> Result<(), Self::Error>;
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/// Reset the device
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#[inline]
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fn reset(&mut self) -> Result<(), Self::Error> {
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self.write_frame(
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register::COMMON,
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register::common::MODE,
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®ister::common::Mode::Reset.to_register(),
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)?;
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Ok(())
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}
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#[inline]
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fn set_mode(&mut self, mode_options: register::common::Mode) -> Result<(), Self::Error> {
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self.write_frame(
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register::COMMON,
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register::common::MODE,
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&mode_options.to_register(),
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)?;
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Ok(())
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}
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#[inline]
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fn version(&mut self) -> Result<u8, Self::Error> {
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let mut version_register = [0_u8];
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self.read_frame(
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register::COMMON,
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register::common::VERSION,
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&mut version_register,
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)?;
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Ok(version_register[0])
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}
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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///
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/// # Example
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/// ```
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/// use w5500::register::common::RetryTime;
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///
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/// let default = RetryTime::from_millis(200);
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/// assert_eq!(RetryTime::default(), default);
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///
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/// // E.g. 4000 (register) = 400ms
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/// let four_hundred_ms = RetryTime::from_millis(400);
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/// assert_eq!(four_hundred_ms.to_u16(), 4000);
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/// ```
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#[inline]
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fn set_retry_timeout(&mut self, retry_time_value: RetryTime) -> Result<(), Self::Error> {
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self.write_frame(
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register::COMMON,
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register::common::RETRY_TIME,
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&retry_time_value.to_register(),
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)?;
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Ok(())
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}
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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///
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/// E.g. 4000 = 400ms
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#[inline]
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fn current_retry_timeout(&mut self) -> Result<RetryTime, Self::Error> {
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let mut retry_time_register: [u8; 2] = [0, 0];
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self.read_frame(
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register::COMMON,
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register::common::RETRY_TIME,
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&mut retry_time_register,
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)?;
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Ok(RetryTime::from_register(retry_time_register))
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}
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/// Set a new value for the Retry Count register.
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///
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/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
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fn set_retry_count(&mut self, retry_count: RetryCount) -> Result<(), Self::Error> {
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self.write_frame(
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register::COMMON,
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register::common::RETRY_COUNT,
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&retry_count.to_register(),
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)?;
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Ok(())
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}
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/// Get the current Retry Count value
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/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
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///
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/// E.g. In case of errors it will retry for 7 times:
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/// `RCR = 0x0007`
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#[inline]
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fn current_retry_count(&mut self) -> Result<RetryCount, Self::Error> {
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let mut retry_count_register: [u8; 1] = [0];
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self.read_frame(
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register::COMMON,
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register::common::RETRY_COUNT,
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&mut retry_count_register,
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)?;
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Ok(RetryCount::from_register(retry_count_register))
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}
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}
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}
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pub struct BusRef<'a, B: Bus>(pub &'a mut B);
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pub struct BusRef<'a, B: Bus>(pub &'a mut B);
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@ -56,7 +56,7 @@ impl<SpiBus: Bus, HostImpl: Host> Device<SpiBus, HostImpl> {
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fn clear_mode(&mut self) -> Result<(), SpiBus::Error> {
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fn clear_mode(&mut self) -> Result<(), SpiBus::Error> {
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// Set RST common register of the w5500
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// Set RST common register of the w5500
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self.bus.reset()
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self.as_mut().reset()
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}
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}
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#[inline]
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#[inline]
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@ -102,6 +102,7 @@ impl<SpiBus: Bus, HostImpl: Host> Device<SpiBus, HostImpl> {
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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///
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///
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/// # Example
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/// # Example
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///
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/// ```
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/// ```
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/// use w5500::register::common::RetryTime;
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/// use w5500::register::common::RetryTime;
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///
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///
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@ -228,28 +229,38 @@ impl<SpiBus: Bus, HostImpl: Host> DeviceRefMut<'_, SpiBus, HostImpl> {
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Ok(phy[0].into())
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Ok(phy[0].into())
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}
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}
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pub fn version(&mut self) -> Result<u8, SpiBus::Error> {
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/// Reset the device
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let mut version = [0u8];
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self.bus
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.read_frame(register::COMMON, register::common::VERSION, &mut version)?;
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Ok(version[0])
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}
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/// Get the currently set Retry Time-value Register.
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///
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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///
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/// E.g. 4000 = 400ms
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#[inline]
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#[inline]
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pub fn current_retry_timeout(&mut self) -> Result<RetryTime, SpiBus::Error> {
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fn reset(&mut self) -> Result<(), SpiBus::Error> {
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self.bus.current_retry_timeout()
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self.set_mode(register::common::Mode::Reset)
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}
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#[inline]
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fn set_mode(&mut self, mode_options: register::common::Mode) -> Result<(), SpiBus::Error> {
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self.bus.write_frame(
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register::COMMON,
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register::common::MODE,
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&mode_options.to_register(),
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)?;
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Ok(())
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}
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#[inline]
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fn version(&mut self) -> Result<u8, SpiBus::Error> {
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let mut version_register = [0_u8];
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self.bus.read_frame(
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register::COMMON,
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register::common::VERSION,
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&mut version_register,
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)?;
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Ok(version_register[0])
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}
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}
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/// Set a new value for the Retry Time-value Register.
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///
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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///
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///
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/// # Example
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/// # Example
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///
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/// ```
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/// ```
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/// use w5500::register::common::RetryTime;
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/// use w5500::register::common::RetryTime;
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///
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///
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@ -261,26 +272,58 @@ impl<SpiBus: Bus, HostImpl: Host> DeviceRefMut<'_, SpiBus, HostImpl> {
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/// assert_eq!(four_hundred_ms.to_u16(), 4000);
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/// assert_eq!(four_hundred_ms.to_u16(), 4000);
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/// ```
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/// ```
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#[inline]
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#[inline]
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pub fn set_retry_timeout(&mut self, retry_time_value: RetryTime) -> Result<(), SpiBus::Error> {
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fn set_retry_timeout(&mut self, retry_time_value: RetryTime) -> Result<(), SpiBus::Error> {
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self.bus.set_retry_timeout(retry_time_value)
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self.bus.write_frame(
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register::COMMON,
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register::common::RETRY_TIME,
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&retry_time_value.to_register(),
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)?;
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Ok(())
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}
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}
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/// Get the current Retry Count Register value.
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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///
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///
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/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
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/// E.g. 4000 = 400ms
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///
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/// E.g. In case of errors it will retry for 7 times:
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/// `RCR = 0x0007`
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#[inline]
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#[inline]
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pub fn current_retry_count(&mut self) -> Result<RetryCount, SpiBus::Error> {
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fn current_retry_timeout(&mut self) -> Result<RetryTime, SpiBus::Error> {
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self.bus.current_retry_count()
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let mut retry_time_register: [u8; 2] = [0, 0];
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self.bus.read_frame(
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register::COMMON,
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register::common::RETRY_TIME,
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&mut retry_time_register,
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)?;
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Ok(RetryTime::from_register(retry_time_register))
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}
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}
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/// Set a new value for the Retry Count register.
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/// Set a new value for the Retry Count register.
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///
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///
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/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
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/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
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fn set_retry_count(&mut self, retry_count: RetryCount) -> Result<(), SpiBus::Error> {
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self.bus.write_frame(
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register::COMMON,
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register::common::RETRY_COUNT,
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&retry_count.to_register(),
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)?;
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Ok(())
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}
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/// Get the current Retry Count value
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/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
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///
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/// E.g. In case of errors it will retry for 7 times:
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/// `RCR = 0x0007`
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#[inline]
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#[inline]
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pub fn set_retry_count(&mut self, retry_count: RetryCount) -> Result<(), SpiBus::Error> {
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fn current_retry_count(&mut self) -> Result<RetryCount, SpiBus::Error> {
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self.bus.set_retry_count(retry_count)
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let mut retry_count_register: [u8; 1] = [0];
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self.bus.read_frame(
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register::COMMON,
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register::common::RETRY_COUNT,
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&mut retry_count_register,
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)?;
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Ok(RetryCount::from_register(retry_count_register))
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}
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}
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}
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}
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@ -99,7 +99,7 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
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// RESET
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// RESET
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self.reset()?;
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self.reset()?;
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self.set_mode(mode_options)?;
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self.set_mode(mode_options.into())?;
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host.refresh(&mut self.bus)?;
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host.refresh(&mut self.bus)?;
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Ok(Device::new(self.bus, host))
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Ok(Device::new(self.bus, host))
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}
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}
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@ -118,21 +118,38 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
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RawDevice::new(self.bus)
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RawDevice::new(self.bus)
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}
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}
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/// Get the currently set Retry Time-value Register.
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/// Reset the device
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///
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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///
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/// E.g. 4000 = 400ms
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#[inline]
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#[inline]
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pub fn current_retry_timeout(&mut self) -> Result<RetryTime, SpiBus::Error> {
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fn reset(&mut self) -> Result<(), SpiBus::Error> {
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self.bus.current_retry_timeout()
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self.set_mode(register::common::Mode::Reset)
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}
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#[inline]
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fn set_mode(&mut self, mode_options: register::common::Mode) -> Result<(), SpiBus::Error> {
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self.bus.write_frame(
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register::COMMON,
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register::common::MODE,
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&mode_options.to_register(),
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)?;
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Ok(())
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}
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#[inline]
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fn version(&mut self) -> Result<u8, SpiBus::Error> {
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let mut version_register = [0_u8];
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self.bus.read_frame(
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register::COMMON,
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register::common::VERSION,
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&mut version_register,
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)?;
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Ok(version_register[0])
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}
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}
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/// Set a new value for the Retry Time-value Register.
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///
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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///
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///
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/// # Example
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/// # Example
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///
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/// ```
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/// ```
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/// use w5500::register::common::RetryTime;
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/// use w5500::register::common::RetryTime;
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///
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///
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@ -144,27 +161,59 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
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/// assert_eq!(four_hundred_ms.to_u16(), 4000);
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/// assert_eq!(four_hundred_ms.to_u16(), 4000);
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/// ```
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/// ```
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#[inline]
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#[inline]
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pub fn set_retry_timeout(&mut self, retry_time_value: RetryTime) -> Result<(), SpiBus::Error> {
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fn set_retry_timeout(&mut self, retry_time_value: RetryTime) -> Result<(), SpiBus::Error> {
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self.bus.set_retry_timeout(retry_time_value)
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self.bus.write_frame(
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register::COMMON,
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register::common::RETRY_TIME,
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&retry_time_value.to_register(),
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)?;
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Ok(())
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}
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}
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/// Get the current Retry Count Register value.
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/// RTR (Retry Time-value Register) [R/W] [0x0019 – 0x001A] [0x07D0]
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///
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///
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/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
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/// E.g. 4000 = 400ms
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///
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/// E.g. In case of errors it will retry for 7 times:
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/// `RCR = 0x0007`
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#[inline]
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#[inline]
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pub fn current_retry_count(&mut self) -> Result<RetryCount, SpiBus::Error> {
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fn current_retry_timeout(&mut self) -> Result<RetryTime, SpiBus::Error> {
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self.bus.current_retry_count()
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let mut retry_time_register: [u8; 2] = [0, 0];
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self.bus.read_frame(
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register::COMMON,
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register::common::RETRY_TIME,
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&mut retry_time_register,
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)?;
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Ok(RetryTime::from_register(retry_time_register))
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}
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}
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/// Set a new value for the Retry Count register.
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/// Set a new value for the Retry Count register.
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///
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///
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/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
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/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
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||||||
|
fn set_retry_count(&mut self, retry_count: RetryCount) -> Result<(), SpiBus::Error> {
|
||||||
|
self.bus.write_frame(
|
||||||
|
register::COMMON,
|
||||||
|
register::common::RETRY_COUNT,
|
||||||
|
&retry_count.to_register(),
|
||||||
|
)?;
|
||||||
|
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Get the current Retry Count value
|
||||||
|
/// RCR (Retry Count Register) [R/W] [0x001B] [0x08]
|
||||||
|
///
|
||||||
|
/// E.g. In case of errors it will retry for 7 times:
|
||||||
|
/// `RCR = 0x0007`
|
||||||
#[inline]
|
#[inline]
|
||||||
pub fn set_retry_count(&mut self, retry_count: RetryCount) -> Result<(), SpiBus::Error> {
|
fn current_retry_count(&mut self) -> Result<RetryCount, SpiBus::Error> {
|
||||||
self.bus.set_retry_count(retry_count)
|
let mut retry_count_register: [u8; 1] = [0];
|
||||||
|
self.bus.read_frame(
|
||||||
|
register::COMMON,
|
||||||
|
register::common::RETRY_COUNT,
|
||||||
|
&mut retry_count_register,
|
||||||
|
)?;
|
||||||
|
|
||||||
|
Ok(RetryCount::from_register(retry_count_register))
|
||||||
}
|
}
|
||||||
|
|
||||||
#[cfg(not(feature = "no-chip-version-assertion"))]
|
#[cfg(not(feature = "no-chip-version-assertion"))]
|
||||||
|
|
@ -172,7 +221,7 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
|
||||||
&mut self,
|
&mut self,
|
||||||
expected_version: u8,
|
expected_version: u8,
|
||||||
) -> Result<(), InitializeError<SpiBus::Error>> {
|
) -> Result<(), InitializeError<SpiBus::Error>> {
|
||||||
let version = self.bus.version()?;
|
let version = self.version()?;
|
||||||
|
|
||||||
if version != expected_version {
|
if version != expected_version {
|
||||||
Err(InitializeError::ChipNotConnected)
|
Err(InitializeError::ChipNotConnected)
|
||||||
|
|
@ -180,15 +229,6 @@ impl<SpiBus: Bus> UninitializedDevice<SpiBus> {
|
||||||
Ok(())
|
Ok(())
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/// RESET
|
|
||||||
fn reset(&mut self) -> Result<(), SpiBus::Error> {
|
|
||||||
self.bus.reset()
|
|
||||||
}
|
|
||||||
|
|
||||||
fn set_mode(&mut self, mode_options: Mode) -> Result<(), SpiBus::Error> {
|
|
||||||
self.bus.set_mode(mode_options.into())
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<Spi: Transfer<u8> + Write<u8>, ChipSelect: OutputPin>
|
impl<Spi: Transfer<u8> + Write<u8>, ChipSelect: OutputPin>
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue