Began skeleton of new UninitializedW5500 struct and Bus trait/impls
This commit is contained in:
parent
2b82c7f179
commit
03e30ef699
6 changed files with 1019 additions and 976 deletions
39
src/bus/four_wire.rs
Normal file
39
src/bus/four_wire.rs
Normal file
|
|
@ -0,0 +1,39 @@
|
|||
use embedded_hal::digital::v2::OutputPin;
|
||||
use embedded_hal::spi::FullDuplex;
|
||||
|
||||
use crate::bus::Bus;
|
||||
|
||||
pub struct FourWire<ChipSelect: OutputPin> {
|
||||
cs: ChipSelect
|
||||
}
|
||||
|
||||
impl<ChipSelect: OutputPin>
|
||||
FourWire<ChipSelect>
|
||||
{
|
||||
pub fn new(cs: ChipSelect) -> Self {
|
||||
Self { cs }
|
||||
}
|
||||
pub fn release(self) -> ChipSelect {
|
||||
self.cs
|
||||
}
|
||||
}
|
||||
|
||||
impl<Spi: FullDuplex<u8>, ChipSelect: OutputPin> Bus<Spi>
|
||||
for FourWire<ChipSelect>
|
||||
{
|
||||
type Error = FourWireError<Spi::Error, ChipSelect::Error>;
|
||||
fn transfer_frame<'a, 'b>(
|
||||
spi: &'b mut Spi,
|
||||
address_phase: [u8; 2],
|
||||
control_phase: u8,
|
||||
data_phase: &'a mut [u8],
|
||||
) -> Result<&'a mut [u8], nb::Error<Self::Error>> {
|
||||
// TODO implement transfer
|
||||
Ok(data_phase)
|
||||
}
|
||||
}
|
||||
|
||||
pub enum FourWireError<SpiError, ChipSelectError> {
|
||||
SpiError(SpiError),
|
||||
ChipSelectError(ChipSelectError),
|
||||
}
|
||||
18
src/bus/mod.rs
Normal file
18
src/bus/mod.rs
Normal file
|
|
@ -0,0 +1,18 @@
|
|||
use nb::Result;
|
||||
use embedded_hal::spi::FullDuplex;
|
||||
|
||||
mod four_wire;
|
||||
mod three_wire;
|
||||
|
||||
pub use self::four_wire::FourWire;
|
||||
pub use self::three_wire::ThreeWire;
|
||||
|
||||
pub trait Bus<Spi: FullDuplex<u8>> {
|
||||
type Error;
|
||||
fn transfer_frame<'a, 'b>(
|
||||
spi: &'b mut Spi,
|
||||
address_phase: [u8; 2],
|
||||
control_phase: u8,
|
||||
data_phase: &'a mut [u8],
|
||||
) -> Result<&'a mut [u8], Self::Error>;
|
||||
}
|
||||
24
src/bus/three_wire.rs
Normal file
24
src/bus/three_wire.rs
Normal file
|
|
@ -0,0 +1,24 @@
|
|||
use embedded_hal::spi::FullDuplex;
|
||||
|
||||
use crate::bus::Bus;
|
||||
|
||||
pub struct ThreeWire {}
|
||||
|
||||
impl ThreeWire {
|
||||
pub fn new() -> Self {
|
||||
Self { }
|
||||
}
|
||||
}
|
||||
|
||||
impl<Spi: FullDuplex<u8>> Bus<Spi> for ThreeWire {
|
||||
type Error = Spi::Error;
|
||||
fn transfer_frame<'a, 'b>(
|
||||
spi: &'b mut Spi,
|
||||
address_phase: [u8; 2],
|
||||
control_phase: u8,
|
||||
data_phase: &'a mut [u8],
|
||||
) -> Result<&'a mut [u8], nb::Error<Self::Error>> {
|
||||
// TODO implement transfer
|
||||
Ok(data_phase)
|
||||
}
|
||||
}
|
||||
1879
src/lib.rs
1879
src/lib.rs
File diff suppressed because it is too large
Load diff
34
src/uninitialized_w5500.rs
Normal file
34
src/uninitialized_w5500.rs
Normal file
|
|
@ -0,0 +1,34 @@
|
|||
use embedded_hal::spi::FullDuplex;
|
||||
use embedded_hal::digital::v2::OutputPin;
|
||||
use bus::{Bus, FourWire, ThreeWire};
|
||||
use w5500::W5500;
|
||||
|
||||
pub struct UninitializedW5500<Spi: FullDuplex<u8>, SpiBus: Bus<Spi>> {
|
||||
bus: SpiBus,
|
||||
spi: Spi,
|
||||
}
|
||||
|
||||
impl<Spi: FullDuplex<u8>, SpiBus: Bus<Spi>> UninitializedW5500<Spi, SpiBus> {
|
||||
pub fn initialize() -> W5500 {
|
||||
// TODO actually initialize chip
|
||||
W5500 {}
|
||||
}
|
||||
}
|
||||
|
||||
impl<Spi: FullDuplex<u8>, ChipSelect: OutputPin> UninitializedW5500<Spi, FourWire<ChipSelect>> {
|
||||
pub fn new(spi: Spi, cs: ChipSelect) -> Self {
|
||||
Self { spi, bus: FourWire::new(cs) }
|
||||
}
|
||||
pub fn deactivate(self) -> (Spi, ChipSelect) {
|
||||
(self.spi, self.bus.release())
|
||||
}
|
||||
}
|
||||
|
||||
impl<Spi: FullDuplex<u8>> UninitializedW5500<Spi, ThreeWire> {
|
||||
pub fn new(spi: Spi) -> Self {
|
||||
Self { spi, bus: ThreeWire::new() }
|
||||
}
|
||||
pub fn deactivate(self) -> Spi {
|
||||
self.spi
|
||||
}
|
||||
}
|
||||
1
src/w5500.rs
Normal file
1
src/w5500.rs
Normal file
|
|
@ -0,0 +1 @@
|
|||
pub struct W5500 {}
|
||||
Loading…
Add table
Add a link
Reference in a new issue